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Uses of Class
byucc.jhdl.Xilinx.XilinxCL

Packages that use XilinxCL
byucc.jhdl.Xilinx   
byucc.jhdl.Xilinx.Virtex   
byucc.jhdl.Xilinx.Virtex.helpers   
byucc.jhdl.Xilinx.Virtex.Modules   
byucc.jhdl.Xilinx.Virtex.Modules.MultArrayPack   
byucc.jhdl.Xilinx.Virtex2   
byucc.jhdl.Xilinx.XC4000   
byucc.jhdl.Xilinx.XC4000.carryLogic   
byucc.jhdl.Xilinx.XC9000   
 

Uses of XilinxCL in byucc.jhdl.Xilinx
 

Subclasses of XilinxCL in byucc.jhdl.Xilinx
 class Constant
          This class is a structural cell which drives a constant value on to its output wire.
 class gnd
          This class is the GND cell for the Xilinx tools as well as for JHDL simulation.
 class vcc
          This class is the VCC cell for the Xilinx tools as well as for JHDL simulation.
 

Uses of XilinxCL in byucc.jhdl.Xilinx.Virtex
 

Subclasses of XilinxCL in byucc.jhdl.Xilinx.Virtex
 class and2
          This class implements and asynchronous 2-input and gate.
 class and2_g
          This class implements and asynchronous 2-input and gate.
 class and2b1
          This class implements and asynchronous 2-input and gate.
 class and2b2
          This class implements and asynchronous 2-input and gate.
 class and3
          This class implements and asynchronous 3-input and gate.
 class and3_g
          This class implements and asynchronous 3-input and gate.
 class and3b1
          This class implements and asynchronous 3-input and gate.
 class and3b2
          This class implements and asynchronous 3-input and gate.
 class and3b3
          This class implements and asynchronous 3-input and gate.
 class and4
          This class implements and asynchronous 4-input and gate.
 class and4_g
          This class implements and asynchronous 4-input and gate.
 class and4b1
          This class implements and asynchronous 4-input and gate.
 class and4b2
          This class implements and asynchronous 4-input and gate.
 class and4b3
          This class implements and asynchronous 4-input and gate.
 class and4b4
          This class implements and asynchronous 4-input and gate.
 class and5
          This class implements and asynchronous 5-input and gate.
 class and6
          This class implements and asynchronous 6-input and gate.
 class and7
          This class implements and asynchronous 7-input and gate.
 class and8
          This class implements and asynchronous 8-input and gate.
 class and9
          This class implements and asynchronous 9-input and gate.
 class andX
          This class implements an AND gate with arbitrary number of inputs.
 class andX_g
           
 class buf
          BUF is a general purpose, non-inverting buffer.
 class buf_g
          The BUF_G is a generic-width non-inverting buffer cell.
 class bufe
          BUFE, BUFE4, BUFE8, and BUFE16 are single or multiple tristate buffers with inputs I, I3 - I0, I7 - I0, and I15 - I0, respectively; outputs O, O3 - O0, O7 - O0, and O15 - O0, respectively; and active-High output enable (E).
 class buft
          BUFT is a 3-state buffer with input I, output O, and active-Low output enable (T).
 class buft_g
          The BUFT_G is a generic-width tristate buffer cell.
 class d3_8e
          The d3_8e class implements an enabled 3:8 decoder.
 class ibuf_g
          IBUF is a single input buffer.
 class inv_g
          The INV_G is a generic-width inverter cell.
 class iobuf
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_agp
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_ctt
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_f_12
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_f_16
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_f_2
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_f_24
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_f_4
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_f_6
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_f_8
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_gtl
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_gtlp
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_hstl_i
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_hstl_iii
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_hstl_iv
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_lvcmos2
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_pci33_3
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_pci33_5
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_pci66_3
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_s_12
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_s_16
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_s_2
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_s_24
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_s_4
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_s_6
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_s_8
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_sstl2_i
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_sstl2_ii
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_sstl3_i
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobuf_sstl3_ii
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class m2_1
          The M2_1 multiplexer chooses one data bit from two sources (D1 or D0) under the control of the select input (S0).
 class m2_1_g
          The M2_1 multiplexer is a generic-width 2:1 multiplexer.
 class nand2
          This class implements and asynchronous 2-input nand gate.
 class nand2_g
          This class implements and asynchronous 2-input nand gate.
 class nand2b1
          This class implements and asynchronous 2-input nand gate.
 class nand2b2
          This class implements and asynchronous 2-input nand gate.
 class nand3
          This class implements and asynchronous 3-input nand gate.
 class nand3_g
          This class implements and asynchronous 3-input nand gate.
 class nand3b1
          This class implements and asynchronous 3-input nand gate.
 class nand3b2
          This class implements and asynchronous 3-input nand gate.
 class nand3b3
          This class implements and asynchronous 3-input nand gate.
 class nand4
          This class implements and asynchronous 4-input nand gate.
 class nand4_g
          This class implements and asynchronous 4-input nand gate.
 class nand4b1
          This class implements and asynchronous 4-input nand gate.
 class nand4b2
          This class implements and asynchronous 4-input nand gate.
 class nand4b3
          This class implements and asynchronous 4-input nand gate.
 class nand4b4
          This class implements and asynchronous 4-input nand gate.
 class nand5
          This class implements and asynchronous 5-input nand gate.
 class nand6
          This class implements and asynchronous 6-input nand gate.
 class nand7
          This class implements and asynchronous 7-input nand gate.
 class nand8
          This class implements and asynchronous 8-input nand gate.
 class nand9
          This class implements and asynchronous 9-input nand gate.
 class nandX
          This class implements an NAND gate with arbitrary number of inputs.
 class nandX_g
           
 class nor2
          This class implements and asynchronous 2-input nor gate.
 class nor2_g
          This class implements and asynchronous 2-input nor gate.
 class nor2b1
          This class implements and asynchronous 2-input nor gate.
 class nor2b2
          This class implements and asynchronous 2-input nor gate.
 class nor3
          This class implements and asynchronous 3-input nor gate.
 class nor3_g
          This class implements and asynchronous 3-input nor gate.
 class nor3b1
          This class implements and asynchronous 3-input nor gate.
 class nor3b2
          This class implements and asynchronous 3-input nor gate.
 class nor3b3
          This class implements and asynchronous 3-input nor gate.
 class nor4
          This class implements and asynchronous 4-input nor gate.
 class nor4_g
          This class implements and asynchronous 4-input nor gate.
 class nor4b1
          This class implements and asynchronous 4-input nor gate.
 class nor4b2
          This class implements and asynchronous 4-input nor gate.
 class nor4b3
          This class implements and asynchronous 4-input nor gate.
 class nor4b4
          This class implements and asynchronous 4-input nor gate.
 class nor5
          This class implements and asynchronous 5-input nor gate.
 class nor6
          This class implements and asynchronous 6-input nor gate.
 class nor7
          This class implements and asynchronous 7-input nor gate.
 class nor8
          This class implements and asynchronous 8-input nor gate.
 class nor9
          This class implements and asynchronous 9-input nor gate.
 class norX
          This class implements an NOR gate with arbitrary number of inputs.
 class norX_g
           
 class obuf_g
          OBUF is a single output buffer.
 class obuft
          OBUFT is a single 3-state output buffer with active-low enable.
 class obuft_agp
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_ctt
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_f_12
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_f_16
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_f_2
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_f_24
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_f_4
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_f_6
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_f_8
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_g
          OBUFT is a single 3-state output buffer with active-low enable.
 class obuft_gtl
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_gtlp
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_hstl_i
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_hstl_iii
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_hstl_iv
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_lvcmos2
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_pci33_3
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_pci33_5
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_pci66_3
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_s_12
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_s_16
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_s_2
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_s_24
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_s_4
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_s_6
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_s_8
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_sstl2_i
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_sstl2_ii
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_sstl3_i
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuft_sstl3_ii
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class or2
          This class implements and asynchronous 2-input or gate.
 class or2_g
          This class implements and asynchronous 2-input or gate.
 class or2b1
          This class implements and asynchronous 2-input or gate.
 class or2b2
          This class implements and asynchronous 2-input or gate.
 class or3
          This class implements and asynchronous 3-input or gate.
 class or3_g
          This class implements and asynchronous 3-input or gate.
 class or3b1
          This class implements and asynchronous 3-input or gate.
 class or3b2
          This class implements and asynchronous 3-input or gate.
 class or3b3
          This class implements and asynchronous 3-input or gate.
 class or4
          This class implements and asynchronous 4-input or gate.
 class or4_g
          This class implements and asynchronous 4-input or gate.
 class or4b1
          This class implements and asynchronous 4-input or gate.
 class or4b2
          This class implements and asynchronous 4-input or gate.
 class or4b3
          This class implements and asynchronous 4-input or gate.
 class or4b4
          This class implements and asynchronous 4-input or gate.
 class or5
          This class implements and asynchronous 5-input or gate.
 class or6
          This class implements and asynchronous 6-input or gate.
 class or7
          This class implements and asynchronous 7-input or gate.
 class or8
          This class implements and asynchronous 8-input or gate.
 class or9
          This class implements and asynchronous 9-input or gate.
 class orX
          This class implements an OR gate with arbitrary number of inputs.
 class orX_g
           
 class pulldown_g
          The PULLDOWN_G is a generic-width pulldown resistor cell.
 class pullup_g
          The PULLUP_G is a generic-width pullup resistor cell.
 class xnor2
          This class implements and asynchronous 2-input xnor gate.
 class xnor2_g
          This class implements and asynchronous 2-input xnor gate.
 class xnor3
          This class implements and asynchronous 3-input xnor gate.
 class xnor3_g
          This class implements and asynchronous 3-input xnor gate.
 class xnor4
          This class implements and asynchronous 4-input xnor gate.
 class xnor4_g
          This class implements and asynchronous 4-input xnor gate.
 class xnor5
          This class implements and asynchronous 5-input xnor gate.
 class xnor6
          This class implements and asynchronous 6-input xnor gate.
 class xnor7
          This class implements and asynchronous 7-input xnor gate.
 class xnor8
          This class implements and asynchronous 8-input xnor gate.
 class xnor9
          This class implements and asynchronous 9-input xnor gate.
 class xnorX
          This class implements an XNOR gate with arbitrary number of inputs.
 class xor2
          This class implements and asynchronous 2-input xor gate.
 class xor2_g
          This class implements and asynchronous 2-input xor gate.
 class xor3
          This class implements and asynchronous 3-input xor gate.
 class xor3_g
          This class implements and asynchronous 3-input xor gate.
 class xor4
          This class implements and asynchronous 4-input xor gate.
 class xor4_g
          This class implements and asynchronous 4-input xor gate.
 class xor5
          This class implements and asynchronous 5-input xor gate.
 class xor6
          This class implements and asynchronous 6-input xor gate.
 class xor7
          This class implements and asynchronous 7-input xor gate.
 class xor8
          This class implements and asynchronous 8-input xor gate.
 class xor9
          This class implements and asynchronous 9-input xor gate.
 class xorX
          This class implements an XOR gate with arbitrary number of inputs.
 

Uses of XilinxCL in byucc.jhdl.Xilinx.Virtex.helpers
 

Subclasses of XilinxCL in byucc.jhdl.Xilinx.Virtex.helpers
 class adder
          Class used by the TechMapper.
 class adderSubtractor
          Class used by the TechMapper.
 class Subtractor
          Class used by the TechMapper.
 

Uses of XilinxCL in byucc.jhdl.Xilinx.Virtex.Modules
 

Subclasses of XilinxCL in byucc.jhdl.Xilinx.Virtex.Modules
 class mux41
          Class used by the TechMapper.
 class mux81
          Class used by the TechMapper.
 

Uses of XilinxCL in byucc.jhdl.Xilinx.Virtex.Modules.MultArrayPack
 

Subclasses of XilinxCL in byucc.jhdl.Xilinx.Virtex.Modules.MultArrayPack
 class And_fmap_g
           
 

Uses of XilinxCL in byucc.jhdl.Xilinx.Virtex2
 

Subclasses of XilinxCL in byucc.jhdl.Xilinx.Virtex2
 class bufgdll
          Each of the BUF*_ANN classes implements an Annotation-only buffer, i.e.
 class bufgs
          Each of the BUF*_ANN classes implements an Annotation-only buffer, i.e.
 class dcm
          DCM is a digital clock manager that provides multiple functions.
 class icap_virtex2
           
 class iobuf_sstl2_ii_dci
          IOBUF and its variants (listed below) are bi-directional buffers whose I/O interface corresponds to a specific I/O standard.The name extensions (LVCMOS2, PCI33_3, PCI33_5, etc.) specify the standard.
 class iobufds
           
 class obuft_sstl2_i_dci
          OBUFT and its variants (listed below) are single 3-state output buffers with active-Low output Enable whose I/O interface corresponds to a specific I/O standard.
 class obuftds
          OBUFTDS is a single 3-state, differential signaling output buffer with active Low enable and a selectIO interface.
 class roc
           
 class rocbuf
           
 class startbuf_architecture
           
 class toc
           
 class tocbuf
           
 

Uses of XilinxCL in byucc.jhdl.Xilinx.XC4000
 

Subclasses of XilinxCL in byucc.jhdl.Xilinx.XC4000
 class cy4
          This class implements the carry modes for the XC4000 architecture.
 class cy4_mode
          The cy4_mode block is the Annotation wrapper to indicate the exact carry function being implemented to the back end Xilinx tools.
 class fmap_g
          The fmap_g is a generic_width and generic port count wrapper for all XC4000 techmapper specific cells.
 

Uses of XilinxCL in byucc.jhdl.Xilinx.XC4000.carryLogic
 

Subclasses of XilinxCL in byucc.jhdl.Xilinx.XC4000.carryLogic
 class cy4_ADD_F_CI
          Carrylogic to be used with a half adder (3-input xor gate) in the F LUT
 class cy4_ADD_FG_CI
          Carrylogic to be used with half adders (3-input xor gates) in the F and G LUTS
 class cy4_ADD_G_CI
          Carrylogic to be used with a half adder (3-input xor gate) in the G LUT
 class cy4_ADD_G_F1
           
 class cy4_ADD_G_F3_
           
 class cy4_ADDSUB_F_CI
           
 class cy4_ADDSUB_FG_CI
           
 class cy4_ADDSUB_G_CI
           
 class cy4_ADDSUB_G_F1
           
 class cy4_ADDSUB_G_F3_
           
 class cy4_DEC_F_CI
           
 class cy4_DEC_FG_0
           
 class cy4_DEC_FG_CI
           
 class cy4_DEC_G_0
           
 class cy4_DEC_G_CI
           
 class cy4_DEC_G_F1
           
 class cy4_DEC_G_F3_
           
 class cy4_EXAMINE_CI
           
 class cy4_FORCE_0
           
 class cy4_FORCE_1
           
 class cy4_FORCE_CI
           
 class cy4_FORCE_F1
           
 class cy4_FORCE_F3_
           
 class cy4_INC_F_CI
           
 class cy4_INC_FG_1
           
 class cy4_INC_FG_CI
           
 class cy4_INC_G_1
           
 class cy4_INC_G_CI
           
 class cy4_INC_G_F1
           
 class cy4_INC_G_F3_
           
 class cy4_INCDEC_F_CI
           
 class cy4_INCDEC_FG_1
           
 class cy4_INCDEC_FG_CI
           
 class cy4_INCDEC_G_0
           
 class cy4_INCDEC_G_CI
           
 class cy4_INCDEC_G_F1
           
 class cy4_SUB_F_CI
           
 class cy4_SUB_FG_CI
           
 class cy4_SUB_G_1
           
 class cy4_SUB_G_CI
           
 class cy4_SUB_G_F1
           
 class cy4_SUB_G_F3_
           
 

Uses of XilinxCL in byucc.jhdl.Xilinx.XC9000
 

Subclasses of XilinxCL in byucc.jhdl.Xilinx.XC9000
 class add1
          See the Xilinx Libraries Guide for details.
 class adsu1
          See the Xilinx Libraries Guide for details.
 class and5_g
          This class implements and asynchronous 5-input and gate.
 class and6_g
          This class implements and asynchronous 6-input and gate.
 class and7_g
          This class implements and asynchronous 7-input and gate.
 class and8_g
          This class implements and asynchronous 8-input and gate.
 class and9_g
          This class implements and asynchronous 9-input and gate.
 class bufgsr
          See the Xilinx Libraries guide for details.
 class nand5_g
          This class implements and asynchronous 5-input nand gate.
 class nand6_g
          This class implements and asynchronous 6-input nand gate.
 class nand7_g
          This class implements and asynchronous 7-input nand gate.
 class nand8_g
          This class implements and asynchronous 8-input nand gate.
 class nand9_g
          This class implements and asynchronous 9-input nand gate.
 class nor5_g
          This class implements and asynchronous 5-input nor gate.
 class nor6_g
          This class implements and asynchronous 6-input nor gate.
 class nor7_g
          This class implements and asynchronous 7-input nor gate.
 class nor8_g
          This class implements and asynchronous 8-input nor gate.
 class nor9_g
          This class implements and asynchronous 9-input nor gate.
 class or5_g
          This class implements and asynchronous 5-input or gate.
 class or6_g
          This class implements and asynchronous 6-input or gate.
 class or7_g
          This class implements and asynchronous 7-input or gate.
 class or8_g
          This class implements and asynchronous 8-input or gate.
 class or9_g
          This class implements and asynchronous 9-input or gate.
 class xnor5_g
          This class implements and asynchronous 5-input xnor gate.
 class xnor6_g
          This class implements and asynchronous 6-input xnor gate.
 class xnor7_g
          This class implements and asynchronous 7-input xnor gate.
 class xnor8_g
          This class implements and asynchronous 8-input xnor gate.
 class xnor9_g
          This class implements and asynchronous 9-input xnor gate.
 class xor5_g
          This class implements and asynchronous 5-input xor gate.
 class xor6_g
          This class implements and asynchronous 6-input xor gate.
 class xor7_g
          This class implements and asynchronous 7-input xor gate.
 class xor8_g
          This class implements and asynchronous 8-input xor gate.
 class xor9_g
          This class implements and asynchronous 9-input xor gate.
 

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Copyright ? 2006 Brigham Young University, Configurable Computing Laboratory. All Rights Reserved.