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| Class Summary | |
| cy4_ADD_F_CI | Carrylogic to be used with a half adder (3-input xor gate) in the F LUT |
| cy4_ADD_FG_CI | Carrylogic to be used with half adders (3-input xor gates) in the F and G LUTS |
| cy4_ADD_G_CI | Carrylogic to be used with a half adder (3-input xor gate) in the G LUT |
| cy4_ADD_G_F1 | |
| cy4_ADD_G_F3_ | |
| cy4_ADDSUB_F_CI | |
| cy4_ADDSUB_FG_CI | |
| cy4_ADDSUB_G_CI | |
| cy4_ADDSUB_G_F1 | |
| cy4_ADDSUB_G_F3_ | |
| cy4_DEC_F_CI | |
| cy4_DEC_FG_0 | |
| cy4_DEC_FG_CI | |
| cy4_DEC_G_0 | |
| cy4_DEC_G_CI | |
| cy4_DEC_G_F1 | |
| cy4_DEC_G_F3_ | |
| cy4_EXAMINE_CI | |
| cy4_FORCE_0 | |
| cy4_FORCE_1 | |
| cy4_FORCE_CI | |
| cy4_FORCE_F1 | |
| cy4_FORCE_F3_ | |
| cy4_INC_F_CI | |
| cy4_INC_FG_1 | |
| cy4_INC_FG_CI | |
| cy4_INC_G_1 | |
| cy4_INC_G_CI | |
| cy4_INC_G_F1 | |
| cy4_INC_G_F3_ | |
| cy4_INCDEC_F_CI | |
| cy4_INCDEC_FG_1 | |
| cy4_INCDEC_FG_CI | |
| cy4_INCDEC_G_0 | |
| cy4_INCDEC_G_CI | |
| cy4_INCDEC_G_F1 | |
| cy4_SUB_F_CI | |
| cy4_SUB_FG_CI | |
| cy4_SUB_G_1 | |
| cy4_SUB_G_CI | |
| cy4_SUB_G_F1 | |
| cy4_SUB_G_F3_ | |
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