|
|||||||||||
PREV NEXT | FRAMES NO FRAMES |
Packages that use Memory | |
byucc.jhdl.Xilinx | |
byucc.jhdl.Xilinx.Virtex | |
byucc.jhdl.Xilinx.Virtex2 | |
byucc.jhdl.Xilinx.XC4000 |
Uses of Memory in byucc.jhdl.Xilinx |
Subclasses of Memory in byucc.jhdl.Xilinx | |
class |
XilinxMemoryCL
|
class |
XilinxMemorySynch
|
class |
XilinxMemorySynch_1
|
Constructors in byucc.jhdl.Xilinx with parameters of type Memory | |
ram_prop(Memory parent,
int width,
Wire a,
Wire o)
Deprecated. |
Uses of Memory in byucc.jhdl.Xilinx.Virtex |
Subclasses of Memory in byucc.jhdl.Xilinx.Virtex | |
class |
ram16x1d
RAM16X1D is a 16-word by 1-bit static dual-ported RAM. |
class |
ram16x1d_1
RAM16X1D_1 is a 16-word by 1-bit static dual port random access memory with synchronous write capability and negative-edge clock. |
class |
ram16x1s
RAM16X1S is a synchronous 16-word by 1-bit static RAM. |
class |
ram16x1s_1
RAM16X1S_1 is a 16-word by 1-bit static random access memory with synchronous write capability and negative-edge clock. |
class |
ram16x2d
RAM16X2D is a 16-word by 2-bit static dual-ported RAM. |
class |
ram16x2s
RAM16X2S is a synchronous 16-word by 2-bit static RAM. |
class |
ram16x4d
RAM16X4D is a 16-word by 4-bit static dual-ported RAM. |
class |
ram16x4s
RAM16X4S is a synchronous 16-word by 4-bit static RAM. |
class |
ram16x8d
RAM16X8D is a 16-word by 8-bit static dual-ported RAM. |
class |
ram16x8s
RAM16X8S is a synchronous 16-word by 8-bit static RAM. |
class |
ram32x1s
RAM32X1S is a synchronous 32-word by 1-bit static RAM. |
class |
ram32x1s_1
RAM32X1S_1 is a 32-word by 1-bit static random access memory with synchronous write capability. |
class |
ram32x1s_ack
|
class |
ram32x2s
RAM32X2S is a synchronous 32-word by 2-bit static RAM. |
class |
ram32x4s
RAM32X4S is a synchronous 32-word by 4-bit static RAM. |
class |
ram32x8s
RAM32X8S is a synchronous 32-word by 8-bit static RAM. |
class |
srl16
SRL16 is a shift register look up table (LUT). |
class |
srl16e
SRL16E is a shift register look up table (LUT). |
Uses of Memory in byucc.jhdl.Xilinx.Virtex2 |
Subclasses of Memory in byucc.jhdl.Xilinx.Virtex2 | |
class |
ram128x1s
RAM128X1S is a 128-word by 1-bit static random access memory with synchronous write capability. |
class |
ram128x1s_1
RAM128X1S_1 is a 64-word by 1-bit static random access memory with synchronous write capability. |
class |
ram32x1d
RAM32X1D is a 32-word by 1-bit static dual port random access memory with synchronous write capability and a positive-edge clock. |
class |
ram32x1d_1
RAM32X1D_1 is a 32-word by 1-bit static dual port random access memory with synchronous write capability and a negative-edge clock. |
class |
ram64x1d
RAM64X1D is a 64-word by 1-bit static dual port random access memory with synchronous write capability and a positive-edge clock. |
class |
ram64x1d_1
RAM64X1D_1 is a 64-word by 1-bit static dual port random access memory with synchronous write capability and a negative-edge clock. |
class |
ram64x1s
RAM64X1S is a 64-word by 1-bit static random access memory with synchronous write capability. |
class |
ram64x1s_1
RAM64X1S_1 is a 64-word by 1-bit static random access memory with synchronous write capability and a negative-edge clock. |
class |
ram64x2s
RAM64X2S is a 64-word by 2-bit static random access memory with synchronous write capability. |
class |
srlc16
SRLC16 is a shift register look up table (LUT). |
class |
srlc16e
SRLC16E is a shift register look up table (LUT) with carry, clock enable, and asynchro-nous clear. |
Uses of Memory in byucc.jhdl.Xilinx.XC4000 |
Subclasses of Memory in byucc.jhdl.Xilinx.XC4000 | |
class |
ram16x1
RAM16X1 is a 16-word by 1-bit static RAM. |
class |
ram32x1
RAM32X1 is a 32-word by 1-bit static RAM. |
|
|||||||||||
PREV NEXT | FRAMES NO FRAMES |