byucc.jhdl.Xilinx.Virtex2
Class RAMB16_S_S

java.lang.Object
  byucc.jhdl.base.Nameable
      byucc.jhdl.base.Node
          byucc.jhdl.base.Cell
              byucc.jhdl.base.Structural
                  byucc.jhdl.Logic.LogicGates
                      byucc.jhdl.Logic.LogicStatic
                          byucc.jhdl.Logic.Logic
                              byucc.jhdl.Xilinx.Virtex2.RamPack.RAMB16
                                  byucc.jhdl.Xilinx.Virtex2.RAMB16_S_S

All Implemented Interfaces:

BooleanFlags, Checkpointable, Clockable, LargeExternallyUpdateable, byucc.jhdl.base.Propagateable, TreeListable

public class RAMB16_S_S

extends RAMB16

implements LargeExternallyUpdateable, Checkpointable

This class provides the functionality of the RAMB16_Sn_Sn Virtex2 library elements - The Dual-ported BlockRams. If the port widths differ, port B must be wider than port A. Data width and address width must match as follows:

Data Width	1	2	4	8, 9	16, 18	32, 36
Addr Width	14	13	12	11	10	9

Field Summary

protected boolean	_islong
static CellInterface[]	cell_interface
protected long[]	contents
static CellInterface[]	implicit_interface

Fields inherited from class byucc.jhdl.Logic.Logic

ABOVE, ALIGN_BOTTOM, ALIGN_CENTER, ALIGN_LEFT, ALIGN_LSB, ALIGN_MSB, ALIGN_RIGHT, ALIGN_TOP, BELOW, DOWN, EAST_OF, LEFT_OF, MAX_PACK, NORTH_OF, ON, ONTOP, ONTOP_OF, RIGHT_OF, SOUTH_OF, TOLEFT, TORIGHT, UNCONSTRAINED, UP, WEST_OF

Fields inherited from class byucc.jhdl.Logic.LogicGates

tech_mapper

Fields inherited from class byucc.jhdl.base.Cell

BOOLEAN, CELL_NAME_DECLARATION, CellInterfaceDeterminesUniqueNetlistStructure, DETERMINE_FROM_STRING, GENERICS_DECLARATION, IMPLICIT_INTERFACE_DECLARATION, INTEGER, INTERFACE_DECLARATION, LONG, PORT_IOS_DECLARATION, PORT_NAMES_DECLARATION, PORT_NET_NAMES_DECLARATION, PORT_PROPERTIES, PORT_WIDTHS_DECLARATION, SIGN_EXT, STRING, ZERO_PAD

Fields inherited from interface byucc.jhdl.base.BooleanFlags

ANTECEDANT_IS_BEHAVIORALLY_MODELED, ASYNC_PORT, ASYNCHRONOUS_RESOLVED, ATOMICALLY_PLACEABLE, ATOMICALLY_UNMAPPABLE, BEHAVIORALLY_MODELED_BRANCH, CLK_PORT, CLOCK_METHOD_IMPLEMENTED_BY_USER, CLOCK_METHOD_IS_DISABLED, CLOCKABLE_IS_SCHEDULED, DANGLING_IS_OK, DELETE_MARK, FATAL_BUILD_ERROR_OCCURED, HAS_BEEN_TRACED, HAS_USER_SPECIFIED_NAME, HWUPDATE, IMPLICIT_PORT, IN_CLK_PORT, IN_PORT, INOUT_PORT, IO_TYPE_FLAGS, IS_BEHAVIORALLY_MODELED, IS_ON_BUILD_STACK, IS_ON_PROP_LIST, IS_PLACED, METHODS_IMPLEMENTED_BY_USER, NETLISTABLE, ORIG_WIRE_IS_ATOMIC, OUT_PORT, PLACEMENT_IS_LOCKED, PROPAGATE_METHOD_IMPLEMENTED_BY_USER, PROPAGATE_METHOD_IS_DISABLED, RECURSION_FLAG, RESET_METHOD_IMPLEMENTED_BY_USER, SIMULATEABLE, SOURCELESS_IS_OK, SYNC_PORT, VISIBLE

Constructor Summary

RAMB16_S_S(Node parent, java.lang.String name, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3, java.lang.String s4, Wire w4, java.lang.String s5, Wire w5, java.lang.String s6, Wire w6, java.lang.String s7, Wire w7, java.lang.String s8, Wire w8, java.lang.String s9, Wire w9, java.lang.String s10, Wire w10, java.lang.String s11, Wire w11, java.lang.String s12, Wire w12, java.lang.String s13, Wire w13, java.lang.String[] contents)

RAMB16_S_S(Node parent, java.lang.String name, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3, java.lang.String s4, Wire w4, java.lang.String s5, Wire w5, java.lang.String s6, Wire w6, java.lang.String s7, Wire w7, java.lang.String s8, Wire w8, java.lang.String s9, Wire w9, java.lang.String s10, Wire w10, java.lang.String s11, Wire w11, java.lang.String s12, Wire w12, java.lang.String s13, Wire w13, java.lang.String[] contents, java.lang.String[] contentsP)

RAMB16_S_S(Node parent, java.lang.String name, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3, java.lang.String s4, Wire w4, java.lang.String s5, Wire w5, java.lang.String s6, Wire w6, java.lang.String s7, Wire w7, java.lang.String s8, Wire w8, java.lang.String s9, Wire w9, java.lang.String s10, Wire w10, java.lang.String s11, Wire w11, java.lang.String s12, Wire w12, java.lang.String s13, Wire w13, java.lang.String s14, Wire w14, java.lang.String s15, Wire w15, java.lang.String[] contents)

RAMB16_S_S(Node parent, java.lang.String name, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3, java.lang.String s4, Wire w4, java.lang.String s5, Wire w5, java.lang.String s6, Wire w6, java.lang.String s7, Wire w7, java.lang.String s8, Wire w8, java.lang.String s9, Wire w9, java.lang.String s10, Wire w10, java.lang.String s11, Wire w11, java.lang.String s12, Wire w12, java.lang.String s13, Wire w13, java.lang.String s14, Wire w14, java.lang.String s15, Wire w15, java.lang.String[] contents, java.lang.String[] contentsP)

RAMB16_S_S(Node parent, java.lang.String name, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3, java.lang.String s4, Wire w4, java.lang.String s5, Wire w5, java.lang.String s6, Wire w6, java.lang.String s7, Wire w7, java.lang.String s8, Wire w8, java.lang.String s9, Wire w9, java.lang.String s10, Wire w10, java.lang.String s11, Wire w11, java.lang.String s12, Wire w12, java.lang.String s13, Wire w13, java.lang.String s14, Wire w14, java.lang.String s15, Wire w15, java.lang.String s16, Wire w16, java.lang.String s17, Wire w17, java.lang.String[] contents)

RAMB16_S_S(Node parent, java.lang.String name, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3, java.lang.String s4, Wire w4, java.lang.String s5, Wire w5, java.lang.String s6, Wire w6, java.lang.String s7, Wire w7, java.lang.String s8, Wire w8, java.lang.String s9, Wire w9, java.lang.String s10, Wire w10, java.lang.String s11, Wire w11, java.lang.String s12, Wire w12, java.lang.String s13, Wire w13, java.lang.String s14, Wire w14, java.lang.String s15, Wire w15, java.lang.String s16, Wire w16, java.lang.String s17, Wire w17, java.lang.String[] contents, java.lang.String[] contentsP)

RAMB16_S_S(Node parent, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB)
Constructs a new dual-ported Block RAM.

RAMB16_S_S(Node parent, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, int[] contents)
Constructs a new dual-ported Block RAM.

RAMB16_S_S(Node parent, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, int[] contents, java.lang.String name)
Constructs a new named, dual-ported Block RAM.

RAMB16_S_S(Node parent, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, long[] contents)
Constructs a new dual-ported Block RAM.

RAMB16_S_S(Node parent, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, long[] contents, java.lang.String name)
Constructs a new named, dual-ported Block RAM.

RAMB16_S_S(Node parent, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, java.lang.String name)
Constructs a new named, dual-ported Block RAM.

RAMB16_S_S(Node parent, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, java.lang.String[] contents)
Constructs a new named, dual-ported, multi-clock Block RAM.

RAMB16_S_S(Node parent, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, java.lang.String[] contents, java.lang.String name)
Constructs a new named, dual-ported, multi-clock Block RAM.

RAMB16_S_S(Node parent, Wire clkA, Wire clkB, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB)
Constructs a new dual-ported, multi-clock Block RAM.

RAMB16_S_S(Node parent, Wire clkA, Wire clkB, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, int[] contents)
Constructs a new named, dual-ported, multi-clock Block RAM.

RAMB16_S_S(Node parent, Wire clkA, Wire clkB, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, int[] contents, java.lang.String name)
Constructs a new named, dual-ported, multi-clock Block RAM.

RAMB16_S_S(Node parent, Wire clkA, Wire clkB, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, long[] contents)
Constructs a new named, dual-ported, multi-clock Block RAM.

RAMB16_S_S(Node parent, Wire clkA, Wire clkB, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, long[] contents, java.lang.String name)
Constructs a new named, dual-ported, multi-clock Block RAM.

RAMB16_S_S(Node parent, Wire clkA, Wire clkB, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, java.lang.String name)
Constructs a new dual-ported, multi-clock Block RAM.

RAMB16_S_S(Node parent, Wire clkA, Wire clkB, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, java.lang.String[] contents)
Constructs a new named, dual-ported, multi-clock Block RAM.

RAMB16_S_S(Node parent, Wire clkA, Wire clkB, Wire ssrA, Wire enA, Wire diA, Wire weA, Wire addrA, Wire doA, Wire ssrB, Wire enB, Wire diB, Wire weB, Wire addrB, Wire doB, java.lang.String[] contents, java.lang.String name)
Constructs a new named, dual-ported, multi-clock Block RAM.

Method Summary

BlockRamView	blockRamViewA()
BlockRamView	blockRamViewB()
protected void	connectImplicitPorts() Connects the implicit ports.
protected boolean	defaultSimulationModelIsBehavioral() The default simulation model is structural for Structural cells.
BV[]	fetchBVState()
int[]	fetchState() This method is used to fetch the current state of the Cell.
java.lang.String	getCellName() Access the cell name associated with a derived class.
java.io.Serializable	getData() Called by the checkpointing code to get all of the data that should be checkpointed.
int	getSize(int wid, int aWid)
boolean	isNetlistLeaf() A few rare cells are leafCells during netlisting, but not during simulation.
void	setData(java.io.Serializable data) This is called on a checkpoint restore, and the object checkpointed out is passed back in.
void	updateState(int[] update_value) This method is used to update the state of the Cell in simulator.

Methods inherited from class byucc.jhdl.Xilinx.Virtex2.RamPack.RAMB16

addMyProperties, addMyProperties, addParityProperties, addParityProperties, fillArray, fillArrayIntToLong, fillArrayL, fillArrayLongToLong, InitializeContents, InitializeContentsL, InitializeParity, InitializeParityL, PropertyStringsToIntArray

Methods inherited from class byucc.jhdl.Logic.Logic

clockDriver, clockDriver, connect_implicit_ports, constructSubCell, constructSubCellNoImplicitPorts, enableNewPlacement, enableNewPlacement, extend, extend, getDefaultClock, getDefaultTechMapper, getGlobalClock, getSinkCell, getSourceCell, getSourceCell, getSourceLeaf, getSourcePlaceable, getSourcePlaceableLeaf, getSubCellClass, getTechMapHint, getTechMapHint, getTechMapper, growAndShiftl, lockChildPlacement, lsb, lsb, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, msb, msb, msbIndx, netlist, netlist, netlist, netlist, netlist, netlist, netlist, netlist, padClock_o, padClock_o, padClock_o, padClock, padClock, padClock, padIn_o, padIn_o, padIn_o, padIn, padIn, padIn, padInout_o, padInout_o, padInout_o, padInout, padInout, padInout, padOut_o, padOut_o, padOut_o, padOut, padOut, padOut, padOutT_o, padOutT_o, padOutT_o, padOutT, padOutT, padOutT, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, printTechMapHints, range, rotate, rotate, scale, scale, setBBox, setDefaultTechMapper, setFloorPlannerIsMaster, setTechMappingEnabled, setWandH, signExtend_o, signExtend, signExtend, sink, source, takeBot_o, takeBot, takeBot, takeBotSigned_o, takeBotSigned, takeTop_o, takeTop, takeTop, techmap, techMappingEnabled, translate, translate, zeroExtend_o, zeroExtend, zeroExtend, zeroExtendRight_o, zeroExtendRight

Methods inherited from class byucc.jhdl.Logic.LogicStatic

add_o, add_o, and_o, and_o, and, and, buf_o, buf_o, buf, buf, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux, nc, nc, nc, nc, nc, nc, not_o, not_o, not, not, or_o, or_o, or, or, reg_o, reg, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor, xor_o, xor

Methods inherited from class byucc.jhdl.Logic.LogicGates

add_o, add_o, add_o, add_o, add_o, add_o, add, add, add, add, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub, addsub, addsub, addsub, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, ashiftr_o, ashiftr, ashiftr, buf_o, buf_o, buf, buf, checkValueRepresentableInWidth, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux_o, mux_o, mux_o, mux_o, mux_o, mux, mux, mux, mux, mux, mux, name, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nc, nc, nc, nc, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, not_o, not_o, not, not, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, pulldown, pulldown, pullup, pullup, reg_o, reg_o, reg_o, reg_o, reg, reg, reg, reg, regc_o, regc_o, regc_o, regc_o, regc, regc, regc, regc, regce_o, regce_o, regce_o, regce_o, regce, regce, regce, regce, regp_o, regp_o, regp_o, regp_o, regp, regp, regp, regp, regpe_o, regpe_o, regpe_o, regpe_o, regpe, regpe, regpe, regpe, regr_o, regr_o, regr_o, regr_o, regr, regr, regr, regr, regre_o, regre_o, regre_o, regre_o, regre, regre, regre, regre, regs_o, regs_o, regs_o, regs_o, regs, regs, regs, regs, regse_o, regse_o, regse_o, regse_o, regse, regse, regse, regse, shiftl_o, shiftl, shiftl, shiftr_o, shiftr, shiftr, sub_o, sub_o, sub_o, sub_o, sub_o, sub_o, sub, sub, sub, sub, tbuf_o, tbuf_o, tbuf, tbuf, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor

Methods inherited from class byucc.jhdl.base.Structural

behavioralModelIsAvailable, clock, clockMethodIsDisabled, clockMethodIsDisabled, clockMethodIsEnabled, clockMethodIsEnabled, hasBeenTraced, hasBeenTraced, hasBehaviorInClockMethod, hasBehaviorInPropagateMethod, isAsynchronouslyScheduled, isAsynchronouslyScheduled, isFallingEdgeTriggered, isReadyToBeAsynchronouslyScheduled, isRisingEdgeTriggered, needsToBeAsynchronouslyScheduled, needsToBeClocked, propagate, propagateMethodIsDisabled, propagateMethodIsDisabled, propagateMethodIsEnabled, propagateMethodIsEnabled, reset, willUseHWUpdate, willUseHWUpdate

Methods inherited from class byucc.jhdl.base.Cell

addPort, addPorts, addProperties, addProperties, addProperty, addProperty, addProperty, addProperty, antecedantIsBehaviorallyModeled, antecedantIsBehaviorallyModeled, bind, bind, bind, bind, cellInterfaceDeterminesUniqueNetlistStructure, clk, connect, connectAllWires, connectOptional, disableAllBehavioralModels, disableBehavioralModel, enableBehavioralModel, getArgument, getAttachedPort, getAttachedWire, getAttachedWireNoException, getCellNetlist, getCellNetList, getCellNetlist, getCellNetlist, getDescendents, getFlatNetlist, getFlatNetlistableChildren, getGeneric, getHeight, getNetlistableChildren, getPlacementInfo, getPortProperties, getPortRecord, getPortRecords, getProperties, getProperty, getPropertyValue, getSinkWires, getSourceWires, getUniqueCellName, getWidth, getX, getY, hasPort, hasPorts, in, in, inout, inout, isAsynchronousSourceSinkResolved, isBehaviorallyModeled, isBehaviorallyModeledBranch, isInput, isLeafCell, isNetlistable, isNetlistable, isNetlistablePort, isNotNetlistable, isNotNetlistablePort, isNotVisible, isOutput, isPlaceable, isPlaceable, isPlaced, isPlaced, isPlacementLocked, isRoot, isSimulateable, isSimulateable, isSink, isSource, isVisible, isVisible, join, lockPlacement, nc, out, out, param, popHierarchy, port, port, port, postorderCheck, preorderCheck, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchyNoImplicitPorts, pushHierarchyNoImplicitPorts, removeAllUnconnectedPorts, removePort, removeProperty, replaceProperty, replaceProperty, resetBehavioralModelsToDefaults, setAsynchronousSourceSinkResolved, setGeneric, setHeight, setNotNetlistable, setNotNetlistable, setNotVisible, setNotVisible, setPlacementInfo, setPortNotNetlistable, setPortNotNetlistable, setProperty, setWidth, subClassDelete, toString, uniquifyCell, userDefinedClockCount, verifyAndCleanup

Methods inherited from class byucc.jhdl.base.Node

addObservable, addSimulatorCallback, checkAll, delete, getBuildingFlag, getChildren, getChildrenEnumeration, getInstanceName, getParent, getParentCell, getRelatives, getSystem, getWires, optimize, orphanAllowed, printAllChildren, printTree, removeSimulatorCallback, setDefaultClock

Methods inherited from class byucc.jhdl.base.Nameable

caseSensitivity, caseSensitivity, disableNameClashChecking, getFullName, getFullNameNoTestBench, getHierNameNoTestBench, getInstanceNo, getInstanceNumber, getLeafName, getLeafName, getRelativeName, getUserName, getUserName, hasUserSpecifiedName, isDescendantOf, setInstanceNumber

Methods inherited from class java.lang.Object

clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait

Field Detail

implicit_interface

public static CellInterface[] implicit_interface

cell_interface

public static CellInterface[] cell_interface

contents

protected long[] contents

_islong

protected boolean _islong

Constructor Detail

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB)

Constructs a new dual-ported Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  int[] contents)

Constructs a new dual-ported Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - An int[] representing the contents of the entire BlockRam. THIS ARRAY IS NOT PACKED! Each element corresponds to an address.

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  int[] contents,
                  java.lang.String name)

Constructs a new named, dual-ported Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - An int[] representing the contents of the entire BlockRam. THIS ARRAY IS NOT PACKED! Each element corresponds to an address.

name - Instance name of the RAMB16_S_S

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  java.lang.String name)

Constructs a new named, dual-ported Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

name - Instance name of the RAMB16_S_S

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire clkA,
                  Wire clkB,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB)

Constructs a new dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

clkA - The Wire connected to clock port clkA

clkB - The Wire connected to clock port clkB

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire clkA,
                  Wire clkB,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  java.lang.String name)

Constructs a new dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

clkA - The Wire connected to clock port clkA

clkB - The Wire connected to clock port clkB

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

name - Instance name of the RAMB16_S_S

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire clkA,
                  Wire clkB,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  int[] contents)

Constructs a new named, dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

clkA - The Wire connected to clock port clkA

clkB - The Wire connected to clock port clkB

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - An int[] representing the contents of the entire BlockRam. THIS ARRAY IS NOT PACKED! Each element corresponds to an address.

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire clkA,
                  Wire clkB,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  int[] contents,
                  java.lang.String name)

Constructs a new named, dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

clkA - The Wire connected to clock port clkA

clkB - The Wire connected to clock port clkB

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - An int[] representing the contents of the entire BlockRam. THIS ARRAY IS NOT PACKED! Each element corresponds to an address.

name - Instance name of the RAMB16_S_S

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  long[] contents)

Constructs a new dual-ported Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - A long[] representing the contents of the entire BlockRam. THIS ARRAY IS NOT PACKED! Each element corresponds to an address.

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  long[] contents,
                  java.lang.String name)

Constructs a new named, dual-ported Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - A long[] representing the contents of the entire BlockRam. THIS ARRAY IS NOT PACKED! Each element corresponds to an address.

name - Instance name of the RAMB16_S_S

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire clkA,
                  Wire clkB,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  long[] contents)

Constructs a new named, dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

clkA - The Wire connected to clock port clkA

clkB - The Wire connected to clock port clkB

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - A long[] representing the contents of the entire BlockRam. THIS ARRAY IS NOT PACKED! Each element corresponds to an address.

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire clkA,
                  Wire clkB,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  long[] contents,
                  java.lang.String name)

Constructs a new named, dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

clkA - The Wire connected to clock port clkA

clkB - The Wire connected to clock port clkB

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - A long[] representing the contents of the entire BlockRam. THIS ARRAY IS NOT PACKED! Each element corresponds to an address.

name - Instance name of the RAMB16_S_S

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  java.lang.String name,
                  java.lang.String s0,
                  Wire w0,
                  java.lang.String s1,
                  Wire w1,
                  java.lang.String s2,
                  Wire w2,
                  java.lang.String s3,
                  Wire w3,
                  java.lang.String s4,
                  Wire w4,
                  java.lang.String s5,
                  Wire w5,
                  java.lang.String s6,
                  Wire w6,
                  java.lang.String s7,
                  Wire w7,
                  java.lang.String s8,
                  Wire w8,
                  java.lang.String s9,
                  Wire w9,
                  java.lang.String s10,
                  Wire w10,
                  java.lang.String s11,
                  Wire w11,
                  java.lang.String s12,
                  Wire w12,
                  java.lang.String s13,
                  Wire w13,
                  java.lang.String[] contents,
                  java.lang.String[] contentsP)

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  java.lang.String name,
                  java.lang.String s0,
                  Wire w0,
                  java.lang.String s1,
                  Wire w1,
                  java.lang.String s2,
                  Wire w2,
                  java.lang.String s3,
                  Wire w3,
                  java.lang.String s4,
                  Wire w4,
                  java.lang.String s5,
                  Wire w5,
                  java.lang.String s6,
                  Wire w6,
                  java.lang.String s7,
                  Wire w7,
                  java.lang.String s8,
                  Wire w8,
                  java.lang.String s9,
                  Wire w9,
                  java.lang.String s10,
                  Wire w10,
                  java.lang.String s11,
                  Wire w11,
                  java.lang.String s12,
                  Wire w12,
                  java.lang.String s13,
                  Wire w13,
                  java.lang.String[] contents)

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  java.lang.String name,
                  java.lang.String s0,
                  Wire w0,
                  java.lang.String s1,
                  Wire w1,
                  java.lang.String s2,
                  Wire w2,
                  java.lang.String s3,
                  Wire w3,
                  java.lang.String s4,
                  Wire w4,
                  java.lang.String s5,
                  Wire w5,
                  java.lang.String s6,
                  Wire w6,
                  java.lang.String s7,
                  Wire w7,
                  java.lang.String s8,
                  Wire w8,
                  java.lang.String s9,
                  Wire w9,
                  java.lang.String s10,
                  Wire w10,
                  java.lang.String s11,
                  Wire w11,
                  java.lang.String s12,
                  Wire w12,
                  java.lang.String s13,
                  Wire w13,
                  java.lang.String s14,
                  Wire w14,
                  java.lang.String s15,
                  Wire w15,
                  java.lang.String[] contents,
                  java.lang.String[] contentsP)

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  java.lang.String name,
                  java.lang.String s0,
                  Wire w0,
                  java.lang.String s1,
                  Wire w1,
                  java.lang.String s2,
                  Wire w2,
                  java.lang.String s3,
                  Wire w3,
                  java.lang.String s4,
                  Wire w4,
                  java.lang.String s5,
                  Wire w5,
                  java.lang.String s6,
                  Wire w6,
                  java.lang.String s7,
                  Wire w7,
                  java.lang.String s8,
                  Wire w8,
                  java.lang.String s9,
                  Wire w9,
                  java.lang.String s10,
                  Wire w10,
                  java.lang.String s11,
                  Wire w11,
                  java.lang.String s12,
                  Wire w12,
                  java.lang.String s13,
                  Wire w13,
                  java.lang.String s14,
                  Wire w14,
                  java.lang.String s15,
                  Wire w15,
                  java.lang.String[] contents)

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  java.lang.String name,
                  java.lang.String s0,
                  Wire w0,
                  java.lang.String s1,
                  Wire w1,
                  java.lang.String s2,
                  Wire w2,
                  java.lang.String s3,
                  Wire w3,
                  java.lang.String s4,
                  Wire w4,
                  java.lang.String s5,
                  Wire w5,
                  java.lang.String s6,
                  Wire w6,
                  java.lang.String s7,
                  Wire w7,
                  java.lang.String s8,
                  Wire w8,
                  java.lang.String s9,
                  Wire w9,
                  java.lang.String s10,
                  Wire w10,
                  java.lang.String s11,
                  Wire w11,
                  java.lang.String s12,
                  Wire w12,
                  java.lang.String s13,
                  Wire w13,
                  java.lang.String s14,
                  Wire w14,
                  java.lang.String s15,
                  Wire w15,
                  java.lang.String s16,
                  Wire w16,
                  java.lang.String s17,
                  Wire w17,
                  java.lang.String[] contents,
                  java.lang.String[] contentsP)

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  java.lang.String name,
                  java.lang.String s0,
                  Wire w0,
                  java.lang.String s1,
                  Wire w1,
                  java.lang.String s2,
                  Wire w2,
                  java.lang.String s3,
                  Wire w3,
                  java.lang.String s4,
                  Wire w4,
                  java.lang.String s5,
                  Wire w5,
                  java.lang.String s6,
                  Wire w6,
                  java.lang.String s7,
                  Wire w7,
                  java.lang.String s8,
                  Wire w8,
                  java.lang.String s9,
                  Wire w9,
                  java.lang.String s10,
                  Wire w10,
                  java.lang.String s11,
                  Wire w11,
                  java.lang.String s12,
                  Wire w12,
                  java.lang.String s13,
                  Wire w13,
                  java.lang.String s14,
                  Wire w14,
                  java.lang.String s15,
                  Wire w15,
                  java.lang.String s16,
                  Wire w16,
                  java.lang.String s17,
                  Wire w17,
                  java.lang.String[] contents)

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire clkA,
                  Wire clkB,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  java.lang.String[] contents)

Constructs a new named, dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

clkA - The Wire connected to clock port clkA

clkB - The Wire connected to clock port clkB

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - A String[] representing the contents of the entire BlockRam.

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire clkA,
                  Wire clkB,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  java.lang.String[] contents,
                  java.lang.String name)

Constructs a new named, dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

clkA - The Wire connected to clock port clkA

clkB - The Wire connected to clock port clkB

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - A String[] representing the contents of the entire BlockRam.

name - Instance name of the RAMB16_S_S

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  java.lang.String[] contents)

Constructs a new named, dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - A String[] representing the contents of the entire BlockRam.

RAMB16_S_S

public RAMB16_S_S(Node parent,
                  Wire ssrA,
                  Wire enA,
                  Wire diA,
                  Wire weA,
                  Wire addrA,
                  Wire doA,
                  Wire ssrB,
                  Wire enB,
                  Wire diB,
                  Wire weB,
                  Wire addrB,
                  Wire doB,
                  java.lang.String[] contents,
                  java.lang.String name)

Constructs a new named, dual-ported, multi-clock Block RAM.

Parameters:

parent - The parent Cell to the RAMB16_S_S

ssrA - The Wire connected to input port ssrA

enA - The Wire connected to input port enA

diA - The Wire connected to input port diA

weA - The Wire connected to input port weA

addrA - The Wire connected to input port addrA

doA - The Wire connected to output port doA

ssrB - The Wire connected to input port ssrB

enB - The Wire connected to input port enB

diB - The Wire connected to input port diB

weB - The Wire connected to input port weB

addrB - The Wire connected to input port addrB

doB - The Wire connected to output port doB

contents - A String[] representing the contents of the entire BlockRam.

name - Instance name of the RAMB16_S_S

Method Detail

connectImplicitPorts

protected void connectImplicitPorts()

Description copied from class: Logic

Connects the implicit ports. Override this if you shadow #implicit_ports. If you used the old version of connect_implicit_ports, this method will use reflection to see that the old version gets called correctly.

Overrides:

connectImplicitPorts in class Logic

getCellName

public java.lang.String getCellName()

Description copied from class: Cell

Access the cell name associated with a derived class. The cellname field is lazily evaluated on the first call of this method. Can be overriden to make cellname different by instance. If the field does not exist, this defaults to the classname.

Overrides:

getCellName in class Cell

Returns:

the cell name associated with a derived class, null if not declared.

isNetlistLeaf

public boolean isNetlistLeaf()

Description copied from class: Cell

A few rare cells are leafCells during netlisting, but not during simulation. Overriding this method should allow that behavior.

Overrides:

isNetlistLeaf in class Cell

Returns:

true is this cell is a leaf during netlisting, false otherwise.

defaultSimulationModelIsBehavioral

protected boolean defaultSimulationModelIsBehavioral()

Description copied from class: Structural

The default simulation model is structural for Structural cells. If the default should be behavioral, the user will need to overload this method to return true in cases besides TestBenches or leaf cells.

Overrides:

defaultSimulationModelIsBehavioral in class Structural

Returns:

true if TestBench or leafCell, false otherwise.

updateState

public void updateState(int[] update_value)

Description copied from interface: LargeExternallyUpdateable

This method is used to update the state of the Cell in simulator.

Specified by:

updateState in interface LargeExternallyUpdateable

Parameters:

update_value - the state to update to

fetchState

public int[] fetchState()

Description copied from interface: LargeExternallyUpdateable

This method is used to fetch the current state of the Cell.

Specified by:

fetchState in interface LargeExternallyUpdateable

Returns:

the current state

fetchBVState

public BV[] fetchBVState()

getData

public java.io.Serializable getData()

Description copied from interface: Checkpointable

Called by the checkpointing code to get all of the data that should be checkpointed. The data in the object returned should include all literal values last "put" onto all output wires, and any internal state that must be saved

Specified by:

getData in interface Checkpointable

Returns:

all state to be saved

setData

public void setData(java.io.Serializable data)

Description copied from interface: Checkpointable

This is called on a checkpoint restore, and the object checkpointed out is passed back in. In this function it is the responsibility of the circuit to do "put"s on all output wires using the *literal* (non-calculated) values checkpointed.

Specified by:

setData in interface Checkpointable

Parameters:

data - the state that was saved earlier

getSize

public int getSize(int wid,
                   int aWid)

blockRamViewA

public BlockRamView blockRamViewA()

blockRamViewB

public BlockRamView blockRamViewB()