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java.lang.Objectbyucc.jhdl.synth.operators.LogicSynthesizer
byucc.jhdl.synth.operators.EqSynthesizer
A class responsible for efficiently synthesizing eq operators in a DataFlowGraph. This class extends LogicSynthesizer.
Constructor Summary | |
EqSynthesizer()
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Method Summary | |
Wire |
createCell(Logic parent,
DFVertex operator,
Wire[] inputWires)
Create a cell from the given DFVertex operator. |
Methods inherited from class byucc.jhdl.synth.operators.LogicSynthesizer |
resolveInputWidths, resolveOutputWidth |
Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait |
Constructor Detail |
public EqSynthesizer()
Method Detail |
public Wire createCell(Logic parent, DFVertex operator, Wire[] inputWires)
Specifically, EqSynthesizer looks for a 1-bit constant as one of its inputs and creates either a wire or an inverter. If neither input is a 1-bit constant, then EqSynthesizer will throw an exception.
createCell
in interface OperatorSynthesizer
createCell
in class LogicSynthesizer
operator
- an operator in a DataFlowGraph specifying the operation to
be performed by the new cell.inputWires
- The input wires for this operator (ignored)
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