Class Summary |
ASCII_CharStream |
An implementation of interface CharStream, where the stream is assumed to
contain only ASCII characters (without unicode processing). |
Block |
This class records all of the relevant state information for
physical IOBs, slices, and BlockRAMs in Virtex, including
information about flip-flops, RAMs, and RAM address signals. |
LL_Virtex |
The Xilinx Logical Allocation file (.ll file) parser for Virtex
FPGAs. |
LL_VirtexTokenManager |
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LocationParams |
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MRP_Virtex |
This class parses Section 5 (the optimization section) of Virtex
.mrp (Map report) files generated with the -detail
option to Map and builds a MergedSignalsHash which
relates physical signal names to all their logical signal aliases. |
MRP_VirtexTokenManager |
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RBLocation |
This class is used to keep track of the location of a symbol
(flip-flop or RAM) in the readback bitstream. |
SimpleCharStream |
An implementation of interface CharStream, where the stream is assumed to
contain only ASCII characters (without unicode processing). |
Token |
Describes the input token stream. |
VirtexBitstreamParams |
This class is used to record the information about a specific
Virtex FPGA during the creation of an .rbentry file as
well as provide a method for calculating the absolute offset of a
readback state bit from the offset provided by the Xilinx logical
allocation file (.ll) file. |
VirtexToJHDLSyms |
This class builds hardware symbol tables (.rbentry )
for Xilinx Virtex-based designs described in JHDL. |
VirtexXpressBitstreamParams |
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VirtexXpressToJHDLSyms |
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XDL_Virtex |
This class parses XDL file for Virtex FPGA designs and builds the
data structures necessary to associate logical state elements with
their state in readback bitstreams. |
XDL_VirtexTokenManager |
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XpressLocationMapper |
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