byucc.jhdl.platforms.util.readback.Xilinx.Virtex
Class VirtexToJHDLSyms

java.lang.Object
  byucc.jhdl.platforms.util.readback.Xilinx.Virtex.VirtexToJHDLSyms

public class VirtexToJHDLSyms

extends java.lang.Object

This class builds hardware symbol tables (.rbentry) for Xilinx Virtex-based designs described in JHDL. The program takes several command-line arguments for adjusting the symbol table output. The command-line usage of the command is:

java VirtexToJHDLSyms [-nets] [-clbheader <size in bits>] [-bramheader <size in bits>] [-byteMirrored] <partType> <basename>

The options have the following meanings:

[-nets]

Optional: builds a .phynets file which lists the physical sources of all physical nets and the nets' aliases.

[-clbheader <size in bits>]

Optional: defines the extra number of bits which occur before the first readback data frame from the CLB portion of the chip. Usually this quantity is zero and there is no need for this option.

[-bramheader <size in bits>]

Optional: defines the extra number of bits which occur before the first readback data frame from each BlockRAM portion of the chip. Usually this quantity is zero and there is no need for this option.

[-byteMirrored]

Optional: defines how the bits in a byte are addressed. Without this option, the left-most bit (the most significant bit, or MSB) in each byte has an address of 0 while the right-most bit has an address of 7. This is usual ordering for bits in a configuration bitstream. When this option is used, the right-most bit has an address of 0 and the left-most bit in the byte has an address of 7. This may be necessary for some FPGA systems where the readback data is packed into bytes in the reverse order with respect to normal configuration bitstreams.

<partType>

Required: The specific Virtex FPGA part used for the design. This can be any of the following: XCV50, XCV100, XCV150, XCV200, XCV300, XCV400, XCV600, XCV800, and XCV1000.

<basename>

Required: The name of the design without any file extensions. For instance, if the design was netlist as "xp_mydesign.edn", then the <basename> would be just "xp_mydesign" (without the quotes, of course). The name of the symbol table, in this case, would be "xp_mydesign.rbentry".

The class requires a .rbsym file, the Xilinx Logical Allocation (.ll) file, the Xilinx Map Report (.mrp) file, and the Xilinx Design Language (.xdl) file for the design. The .rbsym file should be created by the testbench at netlist time using calls to ReadBackSymbolWriter. For the -nets to work, the .xdl file must have been generated with routing information, in other words, the Xilinx xdl program was executed without a -nopips option. If the -nets option is not used, the xdl program's -nopips option can be used to reduce the .xdl file size.

Field Summary

static java.lang.String	ArrayChars The delimiters used to parse signal array elements
static int	NO_OFFSET Constant indicating that no readback bitstream offset exists for the given symbol

Constructor Summary

VirtexToJHDLSyms(java.lang.String new_baseName, java.util.Hashtable new_RAMGroupHash, java.util.Hashtable new_NetHashBlock, java.util.Hashtable new_MergedSignalsHash, java.util.Hashtable newInstanceHash, java.util.Hashtable newRBSymHash, java.lang.String partType, int clbHeaderLength, int bramHeaderLength, boolean byteMirrored, boolean new_useAbsolute)
The base constructor which takes information derived from the command line and the various parsers (LL_Virtex, MRP_Virtex, XDL_Virtex, ReadRBSymFile(String)) and initializes the fields of the object.

VirtexToJHDLSyms(java.lang.String new_baseName, java.util.Hashtable new_RAMGroupHash, java.util.Hashtable new_NetHashBlock, java.util.Hashtable new_MergedSignalsHash, java.util.Hashtable newInstanceHash, java.util.Hashtable newRBSymHash, java.lang.String partType, int clbHeaderLength, int bramHeaderLength, boolean byteMirrored, boolean new_useAbsolute, java.util.Vector newNetDrivers)
An extended constructor which takes information derived from the command line and the various parsers (LL_Virtex, MRP_Virtex, XDL_Virtex, ReadRBSymFile(String)) and initializes the fields of the object, including the netDrivers Vector for writing a .phynets file.

Method Summary

void	associateBlocksAndLL() Associates the state elements found in each IOB or slice with the readback bitstream locations for their state using the .ll file information.
void	associateBlocksAndRBSyms() Tries to correlate the ExternallyUpdateable and LargeExternallyUpdateable elements found in the .rbsym file with Blocks found in the physical design in XDL format.
static java.lang.String	EDIFToJHDLName(java.lang.String EDIFName) Converts an EDIF design name into its JHDL equivalent by replacing all occurences of "__" with "-".
java.lang.String	getBaseName() Returns the file base name for the design (in other words, the file name without a extension).
static void	main(java.lang.String[] args) Creates the .rbentry file from the .rbsym, .ll, .mrp, and .xdl files for the design.
static java.util.Hashtable	ReadRBSymFile(java.lang.String baseName) Creates a Hashtable of RBSym objects keyed on the state elements' instance names from the design's .rbsym file.
static void	usageMessage() Prints the usage message for the program to System.err .

Methods inherited from class java.lang.Object

clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

Field Detail

ArrayChars

public static final java.lang.String ArrayChars

The delimiters used to parse signal array elements

See Also:

Constant Field Values

NO_OFFSET

public static final int NO_OFFSET

Constant indicating that no readback bitstream offset exists for the given symbol

See Also:

Constant Field Values

Constructor Detail

VirtexToJHDLSyms

public VirtexToJHDLSyms(java.lang.String new_baseName,
                        java.util.Hashtable new_RAMGroupHash,
                        java.util.Hashtable new_NetHashBlock,
                        java.util.Hashtable new_MergedSignalsHash,
                        java.util.Hashtable newInstanceHash,
                        java.util.Hashtable newRBSymHash,
                        java.lang.String partType,
                        int clbHeaderLength,
                        int bramHeaderLength,
                        boolean byteMirrored,
                        boolean new_useAbsolute)

The base constructor which takes information derived from the command line and the various parsers (LL_Virtex, MRP_Virtex, XDL_Virtex, ReadRBSymFile(String)) and initializes the fields of the object.

Parameters:

new_baseName - The base file name for the design.

new_RAMGroupHash - The RAMGroupHash from the XDL_Virtex parser class.

new_NetHashBlock - The NetHashBlock from the XDL_Virtex parser class.

new_MergedSignalsHash - The MergedSignalsHash from the MRP_Virtex parser class.

newInstanceHash - The InstanceHash from the XDL_Virtex parser class.

newRBSymHash - The RBSymHash generated by ReadRBSymFile(String).

partType - The Virtex part type compatible with VirtexBitstreamParams.

clbHeaderLength - The number of extra header bits which appear before the first frame of CLB readback data. This is usually 0, but some FPGA systems may add bits before the beginning of the first frame due to buffering issues.

byteMirrored - A boolean which is "true" if the LSB (right-most bit) of the bytes in the byte array holding the readback bitstream is accessed as address 0 within the byte. Otherwise, the MSB (left-most bit) of the byte addressed as bit 0.

new_useAbsolute - A boolean which is "true" if the .ll file provides absolute offsets; otherwise, it is "false" and the frame numbers and frame offsets from the .ll file must be used for calculating readback bitstream offsets.

VirtexToJHDLSyms

public VirtexToJHDLSyms(java.lang.String new_baseName,
                        java.util.Hashtable new_RAMGroupHash,
                        java.util.Hashtable new_NetHashBlock,
                        java.util.Hashtable new_MergedSignalsHash,
                        java.util.Hashtable newInstanceHash,
                        java.util.Hashtable newRBSymHash,
                        java.lang.String partType,
                        int clbHeaderLength,
                        int bramHeaderLength,
                        boolean byteMirrored,
                        boolean new_useAbsolute,
                        java.util.Vector newNetDrivers)

An extended constructor which takes information derived from the command line and the various parsers (LL_Virtex, MRP_Virtex, XDL_Virtex, ReadRBSymFile(String)) and initializes the fields of the object, including the netDrivers Vector for writing a .phynets file.

Parameters:

new_baseName - The base file name for the design.

new_RAMGroupHash - The RAMGroupHash from the XDL_Virtex parser class.

new_NetHashBlock - The NetHashBlock from the XDL_Virtex parser class.

new_MergedSignalsHash - The MergedSignalsHash from the MRP_Virtex parser class.

newInstanceHash - The InstanceHash from the XDL_Virtex parser class.

newRBSymHash - The RBSymHash generated by ReadRBSymFile(String).

partType - The Virtex part type compatible with VirtexBitstreamParams.

clbHeaderLength - The number of extra header bits which appear before the first frame of CLB readback data. This is usually 0, but some FPGA systems may add bits before the beginning of the first frame due to buffering issues.

byteMirrored - A boolean which is "true" if the LSB (right-most bit) of the bytes in the byte array holding the readback bitstream is accessed as address 0 within the byte. Otherwise, the MSB (left-most bit) of the byte addressed as bit 0.

new_useAbsolute - A boolean which is "true" if the .ll file provides absolute offsets; otherwise, it is "false" and the frame numbers and frame offsets from the .ll file must be used for calculating readback bitstream offsets.

newNetDrivers - The netDrivers Vector from the XDL_Virtex parser class.

Method Detail

getBaseName

public java.lang.String getBaseName()

Returns the file base name for the design (in other words, the file name without a extension).

usageMessage

public static void usageMessage()

Prints the usage message for the program to System.err .

main

public static void main(java.lang.String[] args)

Creates the .rbentry file from the .rbsym, .ll, .mrp, and .xdl files for the design.

Parameters:

args - The command-line arguments for the program.

ReadRBSymFile

public static java.util.Hashtable ReadRBSymFile(java.lang.String baseName)

Creates a Hashtable of RBSym objects keyed on the state elements' instance names from the design's .rbsym file.

Parameters:

baseName - The base file name for the design (design file name without an file extension.

Returns:

A Hashtable of RBSym objects reflecting the JHDL logical state elements and some of their connectivity information.

EDIFToJHDLName

public static java.lang.String EDIFToJHDLName(java.lang.String EDIFName)

Converts an EDIF design name into its JHDL equivalent by replacing all occurences of "__" with "-". This is method is required since EDIF names and JHDL names are not exactly the same due to limitations in EDIF. I stole this from Joe Hawkins' ll2sym code.

Parameters:

EDIFName - The EDIF instance name to convert.

Returns:

The JHDL equivalent name.

associateBlocksAndLL

public void associateBlocksAndLL()

Associates the state elements found in each IOB or slice with the readback bitstream locations for their state using the .ll file information. The bitstream entries added to the Block entries are arrays since the RAMs have multiple readback bitstream entries. FF's are entered as a single entry array. When no bitstream information can be found, for some reason, all zero bitstream entries are added as padding to maintain the parallel Vector construct.

associateBlocksAndRBSyms

public void associateBlocksAndRBSyms()

Tries to correlate the ExternallyUpdateable and LargeExternallyUpdateable elements found in the .rbsym file with Blocks found in the physical design in XDL format. This effectively correlates logical JHDL state elements to both a physical FPGA resource and its state data in the readback bitstream.