byucc.jhdl.base
Class PortRecord
java.lang.Object
byucc.jhdl.base.PortRecord
- All Implemented Interfaces:
- BooleanFlags
- public class PortRecord
- extends java.lang.Object
- implements BooleanFlags
This class serves as an interface to extract port information
from a Cell. It is the only way to access information on ports.
WARNING: Holding on to a PortRecord after modifying the cell it was created for
(by adding or removing a port, or before and after connecting a wire), may lead
to inconsistent information in the PortRecord.
- Author:
- Brad L. Hutchings
Fields inherited from interface byucc.jhdl.base.BooleanFlags |
ANTECEDANT_IS_BEHAVIORALLY_MODELED, ASYNC_PORT, ASYNCHRONOUS_RESOLVED, ATOMICALLY_PLACEABLE, ATOMICALLY_UNMAPPABLE, BEHAVIORALLY_MODELED_BRANCH, CLK_PORT, CLOCK_METHOD_IMPLEMENTED_BY_USER, CLOCK_METHOD_IS_DISABLED, CLOCKABLE_IS_SCHEDULED, DANGLING_IS_OK, DELETE_MARK, FATAL_BUILD_ERROR_OCCURED, HAS_BEEN_TRACED, HAS_USER_SPECIFIED_NAME, HWUPDATE, IMPLICIT_PORT, IN_CLK_PORT, IN_PORT, INOUT_PORT, IO_TYPE_FLAGS, IS_BEHAVIORALLY_MODELED, IS_ON_BUILD_STACK, IS_ON_PROP_LIST, IS_PLACED, METHODS_IMPLEMENTED_BY_USER, NETLISTABLE, ORIG_WIRE_IS_ATOMIC, OUT_PORT, PLACEMENT_IS_LOCKED, PROPAGATE_METHOD_IMPLEMENTED_BY_USER, PROPAGATE_METHOD_IS_DISABLED, RECURSION_FLAG, RESET_METHOD_IMPLEMENTED_BY_USER, SIMULATEABLE, SOURCELESS_IS_OK, SYNC_PORT, VISIBLE |
Method Summary |
Wire |
getAttachedWire()
Returns the wire that is attached through the port |
Wire |
getAttachedWireOrigin()
This returns the top-level creater of the wire that goes through this
port. |
java.lang.String |
getPortName()
Returns the name of the port. |
int |
getPortWidth()
Returns the width of the port. |
boolean |
isAsyncPort()
Returns true if the port is marked as Asynchronous. |
boolean |
isClkPort()
Returns true if the port is designated as a clock port. |
boolean |
isImplicitPort()
Returns true if the port is designated as implicit. |
boolean |
isInOutPort()
Returns true if the port is set up for input and output. |
boolean |
isInPort()
Returns true if the port is set up for input. |
boolean |
isInput()
Returns true if the attached wire is actually an input. |
boolean |
isNetlistable()
Returns true if the port is marked for netlisting. |
boolean |
isNotNetlistable()
Returns true if the port was marked to not be netlisted. |
boolean |
isOutPort()
Returns true if the port is set up for output. |
boolean |
isOutput()
Returns true if the attached wire is actually an output. |
boolean |
isSyncPort()
|
void |
setAsyncPort()
|
void |
setSyncPort()
|
java.lang.String |
toString()
Returns a string formatted to describe the port and its attached wire. |
Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait |
getPortName
public final java.lang.String getPortName()
- Returns the name of the port.
- Returns:
- The port name.
getPortWidth
public final int getPortWidth()
- Returns the width of the port. If there is no attached wire, this width may
be
PortInfo#NOT_EVALUATED
.
- Returns:
- The width of the port.
isInPort
public final boolean isInPort()
- Returns true if the port is set up for input.
- Returns:
- true if the port is designated as in or inout.
isOutPort
public final boolean isOutPort()
- Returns true if the port is set up for output.
- Returns:
- true if the port is designated as out or inout.
isInOutPort
public final boolean isInOutPort()
- Returns true if the port is set up for input and output.
- Returns:
- true if the port is designated as inout.
isClkPort
public final boolean isClkPort()
- Returns true if the port is designated as a clock port. This also implies that
the port is of atomic width.
- Returns:
- true if the port is a clock port.
isAsyncPort
public final boolean isAsyncPort()
- Returns true if the port is marked as Asynchronous. This says nothing about
whether or not it is an input, output, clk, etc.
- Returns:
- true if the port is marked as Asynchronous.
setAsyncPort
public final void setAsyncPort()
isSyncPort
public final boolean isSyncPort()
setSyncPort
public final void setSyncPort()
isImplicitPort
public final boolean isImplicitPort()
- Returns true if the port is designated as implicit. This means the port was provided
through the implicit interface (see
implicit_interface
).
- Returns:
- true if the port is implicit.
isInput
public boolean isInput()
- Returns true if the attached wire is actually an input. This is false if there is no
attached wire, and true for in and inout ports of any leaf cell and of non-leaf cells
that contain children with the wire (or portion thereof) as an input.
- Returns:
- true if the attached wire is an input to the cell.
isOutput
public boolean isOutput()
- Returns true if the attached wire is actually an output. This is false if there is no
attached wire, and true for out and inout ports of any leaf cell and of non-leaf cells
that contain children with the wire (or portion thereof) as an output.
- Returns:
- true if the attached wire is an output to the cell.
isNetlistable
public final boolean isNetlistable()
- Returns true if the port is marked for netlisting.
- Returns:
- true if the port is netlistable (default true).
isNotNetlistable
public boolean isNotNetlistable()
- Returns true if the port was marked to not be netlisted. Mark a port not netlistable
via
Cell.setPortNotNetlistable(String, boolean)
- Returns:
- true if the port is not netlistable (default false).
getAttachedWire
public final Wire getAttachedWire()
- Returns the wire that is attached through the port
- Returns:
- the attached wire
getAttachedWireOrigin
public Wire getAttachedWireOrigin()
- This returns the top-level creater of the wire that goes through this
port. If this is a multi-bit wire, it is possible that different bits have
different origins, but the one that is returned corresponds to the least
significant bit.
- Returns:
- the origin of the least-significant bit of the attached wire, that is,
the alias which created the wire connected to this port.
toString
public java.lang.String toString()
- Returns a string formatted to describe the port and its attached wire.
- Returns:
- The description of this port.
Copyright ? 2006 Brigham Young University, Configurable Computing Laboratory. All Rights Reserved.