Uses of Interface
byucc.jhdl.Xilinx.FDWrapper

Packages that use FDWrapper

byucc.jhdl.Xilinx.Virtex
byucc.jhdl.Xilinx.XC4000
byucc.jhdl.Xilinx.XC9000

Uses of FDWrapper in byucc.jhdl.Xilinx.Virtex

Classes in byucc.jhdl.Xilinx.Virtex that implement FDWrapper

class	fdc_1_g Implements an asynchronously clearable register in the XC4000 library.
class	fdc_g Implements an asynchronously clearable register in the XC4000 library.
class	fdce_g The FDCE_G is a generic-width, asynchronously cleared, enabled D-type flip-flop.
class	fde FDE is a single D-type flip-flop with data input (D), clock enable (CE), and data output (Q).
class	fde_1 FDE_1 is a single D-type flip-flop with data input (D), clock enable (CE), and data output (Q).
class	fdp_1_g Implements an asynchronously settable register in the XC4000 library.
class	fdp_g Implements an asynchronously settable register in the XC4000 library.
class	fdpe_g The FDCE_P is a generic-width, asynchronously preset, enabled D-type flip-flop.
class	fdr_1_g FDR is a D-type flip-flop with data (D) and synchronous reset (R) inputs and data output (Q).
class	fdr_g FDR is a D-type flip-flop with data (D) and synchronous reset (R) inputs and data output (Q).
class	fdre_1_g FDRE_1 is a D-type flip-flop with data (D), clock enable (CE), and synchronous reset (R) inputs and data output (Q).
class	fdre_g FDRE is a D-type flip-flop with data (D), clock enable (CE), and synchronous reset (R) inputs and data output (Q).
class	fdrs_1_g FDRS_1 is a D-type flip-flop with data (D), synchronous set (S), and synchronous reset (R) inputs and data output (Q).
class	fdrs_g FDRS is a D-type flip-flop with data (D), synchronous set (S), and synchronous reset (R) inputs and data output (Q).
class	fdrse_1_g FDRSE is a D-type flip-flop with synchronous reset (R), synchronous set (S), and clock enable (CE) inputs and data output (Q).
class	fdrse_g FDRSE is a D-type flip-flop with synchronous reset (R), synchronous set (S), and clock enable (CE) inputs and data output (Q).
class	fds_1_g FDS_1 is a D-type flip-flop with data (D) and synchronous set (S) inputs and data output (Q).
class	fds_g FDS is a D-type flip-flop with data (D) and synchronous set (S) inputs and data output (Q).
class	fdse_1_g FDSE_1 is a D-type flip-flop with data (D), clock enable (CE), and synchronous set (S) inputs and data output (Q).
class	fdse_g FDSE is a D-type flip-flop with data (D), clock enable (CE), and synchronous set (S) inputs and data output (Q).
class	ifd_1 The IFD_1 D-type flip-flop is contained in an input/output block (IOB) except for XC5200.
class	ifdi_1 The IFDI_1 D-type flip-flop is contained in an input/output block (IOB).
class	ofdx OFDX, OFDX4, OFDX8, and OFDX16 are single and multiple output D flip-flops.
class	ofdxi OFDXI is contained in an input/output block (IOB).

Uses of FDWrapper in byucc.jhdl.Xilinx.XC4000

Classes in byucc.jhdl.Xilinx.XC4000 that implement FDWrapper

class	fdc Implements an asynchronously clearable register in the XC4000 library.
class	fdp Implements an asynchronously settable register in the XC4000 library.
class	fdr FDR is a D-type flip-flop with data (D) and synchronous reset (R) inputs and data output (Q).
class	fdre FDRE is a D-type flip-flop with data (D), clock enable (CE), and synchronous reset (R) inputs and data output (Q).
class	fds FDS is a D-type flip-flop with data (D) and synchronous set (S) inputs and data output (Q).
class	fdse FDSE is a D-type flip-flop with data (D), clock enable (CE), and synchronous set (S) inputs and data output (Q).

Uses of FDWrapper in byucc.jhdl.Xilinx.XC9000

Classes in byucc.jhdl.Xilinx.XC9000 that implement FDWrapper

class

fdcp_g Implements an asynchronously settable/clearable register in the XC4000 library.