Uses of Interface
byucc.jhdl.Xilinx.FDPrimitive

Packages that use FDPrimitive

byucc.jhdl.Xilinx.Virtex
byucc.jhdl.Xilinx.Virtex2
byucc.jhdl.Xilinx.XC9000

Uses of FDPrimitive in byucc.jhdl.Xilinx.Virtex

Classes in byucc.jhdl.Xilinx.Virtex that implement FDPrimitive

class	fd D is a single D-type flip-flop with data input (D) and data output (Q).
class	fd_1 FD_1 is a single D-type flip-flop with data input (D) and data output (Q).
class	fdc FDC is a single D-type flip-flop with data (D) and asynchronous clear (CLR) inputs and data output (Q).
class	fdc_1 FDC_1 is a single D-type flip-flop with data input (D), asynchronous clear input (CLR), and data output (Q).
class	fdce The FDCE is an asynchronously cleared, enabled D-type flip-flop.
class	fdce_1 FDCE_1 is a single D-type flip-flop with data (D), clock enable (CE), asynchronous clear (CLR) inputs, and data output (Q).
class	fdcp FDCP is a single D-type flip-flop with data (D), asynchronous set (PRE), and asynchronous reset (CLR) inputs and data output (Q).
class	fdcp_1 FDCP_1 is a single D-type flip-flop with data (D), asynchronous preset (PRE) and clear (CLR) inputs, and data output (Q).
class	fdcpe FDRSE is a single D-type flip-flop with synchronous reset (CLR), synchronous set (PRE), and clock enable (CE) inputs and data output (Q).
class	fdcpe_1 FDCPE_1 is a single D-type flip-flop with data (D), clock enable (CE), asynchronous preset (PRE), and asynchronous clear (CLR) inputs and data output (Q).
class	fdp FDP is a single D-type flip-flop with data (D) and asynchronous preset (PRE) inputs and data output (Q).
class	fdp_1 FDP_1 is a single D-type flip-flop with data (D) and asynchronous preset (PRE) inputs and data output (Q).
class	fdpe The FDPE is an asynchronously preset, enabled D-type flip-flop.
class	fdpe_1 FDPE_1 is a single D-type flip-flop with data (D), clock enable (CE), and asynchronous preset (PRE) inputs and data output (Q).
class	fdr FDR is a D-type flip-flop with data (D) and synchronous reset (R) inputs and data output (Q).
class	fdr_1 FDR_1 is a single D-type flip-flop with data (D) and synchronous reset (R) inputs and data output (Q).
class	fdre FDRE is a D-type flip-flop with data (D), clock enable (CE), and synchronous reset (R) inputs and data output (Q).
class	fdre_1 FDRE_1 is a single D-type flip-flop with data (D), clock enable (CE), and synchronous reset (R) inputs and data output (Q).
class	fdrs FDRS is a single D-type flip-flop with data (D), synchronous set (S), and synchronous reset (R) inputs and data output (Q).
class	fdrs_1 FDRS_1 is a single D-type flip-flop with data (D), synchronous set (S), and synchronous reset (R) inputs and data output (Q).
class	fdrse FDRSE is a single D-type flip-flop with synchronous reset (R), synchronous set (S), and clock enable (CE) inputs and data output (Q).
class	fdrse_1 FDRSE_1 is a single D-type flip-flop with synchronous reset (R), synchronous set (S), and clock enable (CE) inputs and data output (Q).
class	fds FDS is a D-type flip-flop with data (D) and synchronous set (S) inputs and data output (Q).
class	fds_1 FDS_1 is a D-type flip-flop with data (D) and synchronous set (S) inputs and data output (Q).
class	fdse FDSE is a D-type flip-flop with data (D), clock enable (CE), and synchronous set (S) inputs and data output (Q).
class	fdse_1 FDSE_1 is a D-type flip-flop with data (D), clock enable (CE), and synchronous set (S) inputs and data output (Q).

Uses of FDPrimitive in byucc.jhdl.Xilinx.Virtex2

Classes in byucc.jhdl.Xilinx.Virtex2 that implement FDPrimitive

class	ifddrcpe IFDDRCPE is a dual data rate (DDR) input D flip-flop with clock enable (CE) and asynchronous preset (PRE) and clear (CLR).
class	ifddrrse FDDRRSE is a Dual Data Rate (DDR) D flip-flop with two separate clocks (C0 and C1) phase shifted 180 degrees that allow selection of two separate data inputs (D0 and D1).
class	ofddrtcpe OFDDRTCPE is a dual data rate (DDR) D flip-flop with clock enable (CE) and asynchronous preset and clear whose output is enabled by a 3-state buffer.
class	ofddrtrse OFDDRTRSE is a dual data rate (DDR) D flip-flop with clock enable (CE) and synchronous reset and set whose output is enabled by a 3-state buffer.

Uses of FDPrimitive in byucc.jhdl.Xilinx.XC9000

Classes in byucc.jhdl.Xilinx.XC9000 that implement FDPrimitive

class

ftcp Asynchronously presettable/clearable toggle flip-flop.