byucc.jhdl.Xilinx.XC4000
Class XC4000TechMapper
java.lang.Object
byucc.jhdl.Logic.BasicTechMapper
byucc.jhdl.Logic.TechMapper
byucc.jhdl.Xilinx.TechMapper
byucc.jhdl.Xilinx.XC4000.XilinxTechMapper
byucc.jhdl.Xilinx.XC4000.XC4000TechMapper
- All Implemented Interfaces:
- FloorPlanModuleEnabled, TechMapPadInterface, TechMapPortInterface
- public class XC4000TechMapper
- extends XilinxTechMapper
- implements FloorPlanModuleEnabled
This is the tech-mapper for the XC4K library. Takes care of
instantiating gates for all circuit-methods in the Logic class.
Uses a CLBPacker object to resolve all tech-mapping hints.
Method Summary |
void |
add(Cell parent,
Wire a,
Wire b,
Wire s,
java.lang.String name)
|
void |
add(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire s,
Wire co,
java.lang.String name)
|
void |
addsub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire add,
Wire s,
java.lang.String name)
|
void |
addsub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire add,
Wire s,
Wire co,
java.lang.String name)
|
void |
and(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
Wire |
ashiftr(Cell parent,
Wire in,
int shift,
Wire out)
|
java.awt.Dimension |
checkAllPlacement(Cell c)
|
void |
checkCellnameCoherency(Cell c)
|
PlacementInfo |
createPlacementInfo(Cell c)
|
FloorPlanModule |
getFloorPlanModule(AbstractViewManager listener)
|
java.lang.String |
getLibName()
Returns the name of the library targetted by the particular techmapper. |
Mapper |
getMapper()
|
java.lang.String |
getRLOCFromPlacementInfo(Cell c)
|
Cell |
getSinkLeafCell(Logic parent,
Cell c,
Wire w)
|
Cell |
getSourceLeafCell(Logic parent,
Wire w)
|
Cell |
getSourcePlaceable(Cell parent,
Wire w)
|
Cell |
getSourcePlaceableLeaf(Cell parent,
Wire w)
|
java.lang.String |
getTechMapHint(Logic parent,
Cell c)
|
java.lang.String |
getTechMapHint(Logic parent,
Wire w)
|
Cell |
map(Logic parent,
Wire[] in,
Wire out,
java.lang.String hints)
|
void |
mux(Cell parent,
Wire[] d,
Wire sel,
Wire out,
java.lang.String name)
|
void |
nand(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
void |
nor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
void |
or(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
void |
padClock(Cell parent,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
|
void |
padIn(Cell parent,
boolean clocked,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
|
void |
padInout(Cell parent,
boolean clockedIn,
Wire in,
boolean clockedOut,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
padInoutR(Cell parent,
boolean clockedIn,
Wire in,
boolean clockedOut,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
padInR(Cell parent,
boolean clocked,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
|
void |
padOut(Cell parent,
boolean clocked,
Wire out,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
padOutR(Cell parent,
boolean clocked,
Wire out,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
padOutT(Cell parent,
boolean clocked,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
place(Logic parent,
Cell c1,
int x,
int y,
java.lang.String hints)
|
void |
place(Logic parent,
Wire w1,
int x,
int y,
int dx,
int dy,
java.lang.String hints)
|
void |
place(Logic parent,
Wire w1,
int x,
int y,
java.lang.String hints)
|
void |
ram(Cell parent,
Wire din,
Wire we,
Wire addr,
Wire dout,
long[] init,
java.lang.String name)
|
void |
ramd(Cell parent,
Wire din,
Wire we,
Wire addrA,
Wire addrB,
Wire outA,
Wire outB,
long[] init,
java.lang.String name)
|
void |
rams(Cell parent,
Wire din,
Wire we,
Wire addr,
Wire dout,
long[] init,
java.lang.String name)
|
void |
reg(Cell parent,
Wire in,
Wire out,
java.lang.String name)
|
void |
reg(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
|
void |
regc(Cell parent,
Wire in,
Wire out,
java.lang.String name)
|
void |
regc(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
|
void |
regp(Cell parent,
Wire in,
Wire out,
java.lang.String name)
|
void |
regp(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
|
void |
regr(Cell parent,
Wire in,
Wire r,
Wire out,
java.lang.String name)
|
void |
regr(Cell parent,
Wire clk,
Wire in,
Wire r,
Wire out,
java.lang.String name)
|
void |
regre(Cell parent,
Wire in,
Wire ce,
Wire r,
Wire out,
java.lang.String name)
|
void |
regre(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire r,
Wire out,
java.lang.String name)
|
void |
regs(Cell parent,
Wire in,
Wire s,
Wire out,
java.lang.String name)
|
void |
regs(Cell parent,
Wire clk,
Wire in,
Wire s,
Wire out,
java.lang.String name)
|
void |
regse(Cell parent,
Wire in,
Wire ce,
Wire s,
Wire out,
java.lang.String name)
|
void |
regse(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire s,
Wire out,
java.lang.String name)
|
void |
rom(Cell parent,
Wire addr,
Wire data,
long[] init,
java.lang.String name)
|
static void |
setErrorReportingPolicy(int policy)
|
Wire |
shiftl(Cell parent,
Wire in,
int shift,
Wire out)
|
Wire |
shiftr(Cell parent,
Wire in,
int shift,
Wire out)
|
Cell |
sink(Logic parent,
Wire w,
Cell c)
Deprecated. use getSinkLeafCell |
Cell |
source(Logic parent,
Wire w)
Deprecated. use getSourcePlaceable, getSourcePlaceableLeaf, or getSourceLeafCell |
void |
sub(Cell parent,
Wire a,
Wire b,
Wire s,
java.lang.String name)
|
void |
sub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire s,
Wire co,
java.lang.String name)
|
java.lang.String |
toString()
|
void |
xnor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
void |
xor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
Methods inherited from class byucc.jhdl.Xilinx.XC4000.XilinxTechMapper |
buf, concat, concat, constant, constant, constant, constant, gnd, not, pulldown, pullup, range, regce, regce, regpe, regpe, tbuf, vcc, wire, wire |
Methods inherited from class byucc.jhdl.Xilinx.TechMapper |
checkGenericWidths, checkGenericWidths, checkGenericWidths, checkGenericWidths, checkGenericWidths, clockDriver, createDefaultNetlister, defaultNetlistIsFlat, deleteAddedPads, getCellName, getGenericWidth, getGenericWidth, getInsertPads, getParentCellName, getUniqueParentName, insertPads, insertTechMapHints, netlist, netlist, processParams, setInsertPads, setInsertTopLevelClockPad, setInsertTopLevelPorts, techmap, useBehavioralModel, useBehavioralModel |
Methods inherited from class byucc.jhdl.Logic.TechMapper |
ALIGN_BOTTOM, ALIGN_LEFT, ALIGN_LSB, ALIGN_MSB, ALIGN_RIGHT, ALIGN_TOP, DOWN, getIgnorePlacementCalls, getInsertTechMapHints, netlist, setIgnorePlacementCalls, setInsertTechMapHints, TOLEFT, TORIGHT, UP |
Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait |
EXCEPTION_MODE
public static final int EXCEPTION_MODE
- See Also:
- Constant Field Values
PRINT_MODE
public static final int PRINT_MODE
- See Also:
- Constant Field Values
QUIET_MODE
public static final int QUIET_MODE
- See Also:
- Constant Field Values
XC4000TechMapper
public XC4000TechMapper()
XC4000TechMapper
public XC4000TechMapper(int reporting_policy)
XC4000TechMapper
public XC4000TechMapper(boolean tme)
XC4000TechMapper
public XC4000TechMapper(boolean tme,
int reporting_policy)
XC4000TechMapper
public XC4000TechMapper(Logic l,
boolean tme)
- Deprecated. use
XC4000TechMapper(boolean)
.
getLibName
public java.lang.String getLibName()
- Description copied from class:
TechMapper
- Returns the name of the library targetted by the particular techmapper.
- Specified by:
getLibName
in class TechMapper
- Returns:
- A String holding the library name.
setErrorReportingPolicy
public static void setErrorReportingPolicy(int policy)
getMapper
public Mapper getMapper()
checkCellnameCoherency
public void checkCellnameCoherency(Cell c)
- Specified by:
checkCellnameCoherency
in class XilinxTechMapper
checkAllPlacement
public java.awt.Dimension checkAllPlacement(Cell c)
- Specified by:
checkAllPlacement
in class XilinxTechMapper
getFloorPlanModule
public FloorPlanModule getFloorPlanModule(AbstractViewManager listener)
- Specified by:
getFloorPlanModule
in interface FloorPlanModuleEnabled
mux
public final void mux(Cell parent,
Wire[] d,
Wire sel,
Wire out,
java.lang.String name)
- Overrides:
mux
in class BasicTechMapper
and
public final void and(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
- Overrides:
and
in class BasicTechMapper
nand
public final void nand(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
- Overrides:
nand
in class BasicTechMapper
or
public final void or(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
- Overrides:
or
in class BasicTechMapper
nor
public final void nor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
- Overrides:
nor
in class BasicTechMapper
xor
public final void xor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
- Overrides:
xor
in class BasicTechMapper
xnor
public final void xnor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
- Overrides:
xnor
in class BasicTechMapper
reg
public final void reg(Cell parent,
Wire in,
Wire out,
java.lang.String name)
- Overrides:
reg
in class BasicTechMapper
regc
public final void regc(Cell parent,
Wire in,
Wire out,
java.lang.String name)
- Overrides:
regc
in class TechMapper
regp
public final void regp(Cell parent,
Wire in,
Wire out,
java.lang.String name)
- Overrides:
regp
in class TechMapper
reg
public final void reg(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
- Overrides:
reg
in class BasicTechMapper
regc
public final void regc(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
- Overrides:
regc
in class TechMapper
regp
public final void regp(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
- Overrides:
regp
in class TechMapper
regr
public void regr(Cell parent,
Wire in,
Wire r,
Wire out,
java.lang.String name)
- Overrides:
regr
in class TechMapper
regre
public void regre(Cell parent,
Wire in,
Wire ce,
Wire r,
Wire out,
java.lang.String name)
- Overrides:
regre
in class TechMapper
regs
public void regs(Cell parent,
Wire in,
Wire s,
Wire out,
java.lang.String name)
- Overrides:
regs
in class TechMapper
regse
public void regse(Cell parent,
Wire in,
Wire ce,
Wire s,
Wire out,
java.lang.String name)
- Overrides:
regse
in class TechMapper
regr
public void regr(Cell parent,
Wire clk,
Wire in,
Wire r,
Wire out,
java.lang.String name)
- Overrides:
regr
in class TechMapper
regre
public void regre(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire r,
Wire out,
java.lang.String name)
- Overrides:
regre
in class TechMapper
regs
public void regs(Cell parent,
Wire clk,
Wire in,
Wire s,
Wire out,
java.lang.String name)
- Overrides:
regs
in class TechMapper
regse
public void regse(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire s,
Wire out,
java.lang.String name)
- Overrides:
regse
in class TechMapper
add
public final void add(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire s,
Wire co,
java.lang.String name)
- Overrides:
add
in class BasicTechMapper
sub
public final void sub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire s,
Wire co,
java.lang.String name)
- Overrides:
sub
in class BasicTechMapper
addsub
public final void addsub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire add,
Wire s,
Wire co,
java.lang.String name)
- Overrides:
addsub
in class BasicTechMapper
add
public final void add(Cell parent,
Wire a,
Wire b,
Wire s,
java.lang.String name)
- Overrides:
add
in class BasicTechMapper
sub
public final void sub(Cell parent,
Wire a,
Wire b,
Wire s,
java.lang.String name)
- Overrides:
sub
in class BasicTechMapper
addsub
public final void addsub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire add,
Wire s,
java.lang.String name)
- Overrides:
addsub
in class BasicTechMapper
ashiftr
public Wire ashiftr(Cell parent,
Wire in,
int shift,
Wire out)
- Overrides:
ashiftr
in class BasicTechMapper
shiftr
public Wire shiftr(Cell parent,
Wire in,
int shift,
Wire out)
- Overrides:
shiftr
in class BasicTechMapper
shiftl
public Wire shiftl(Cell parent,
Wire in,
int shift,
Wire out)
- Overrides:
shiftl
in class BasicTechMapper
rom
public void rom(Cell parent,
Wire addr,
Wire data,
long[] init,
java.lang.String name)
ram
public void ram(Cell parent,
Wire din,
Wire we,
Wire addr,
Wire dout,
long[] init,
java.lang.String name)
rams
public void rams(Cell parent,
Wire din,
Wire we,
Wire addr,
Wire dout,
long[] init,
java.lang.String name)
ramd
public void ramd(Cell parent,
Wire din,
Wire we,
Wire addrA,
Wire addrB,
Wire outA,
Wire outB,
long[] init,
java.lang.String name)
map
public final Cell map(Logic parent,
Wire[] in,
Wire out,
java.lang.String hints)
- Overrides:
map
in class TechMapper
getRLOCFromPlacementInfo
public java.lang.String getRLOCFromPlacementInfo(Cell c)
- Specified by:
getRLOCFromPlacementInfo
in class XilinxTechMapper
place
public final void place(Logic parent,
Cell c1,
int x,
int y,
java.lang.String hints)
- Overrides:
place
in class TechMapper
place
public final void place(Logic parent,
Wire w1,
int x,
int y,
java.lang.String hints)
- Overrides:
place
in class TechMapper
place
public final void place(Logic parent,
Wire w1,
int x,
int y,
int dx,
int dy,
java.lang.String hints)
- Overrides:
place
in class TechMapper
source
public Cell source(Logic parent,
Wire w)
- Deprecated. use getSourcePlaceable, getSourcePlaceableLeaf, or getSourceLeafCell
sink
public Cell sink(Logic parent,
Wire w,
Cell c)
- Deprecated. use getSinkLeafCell
getSourcePlaceable
public Cell getSourcePlaceable(Cell parent,
Wire w)
- Overrides:
getSourcePlaceable
in class TechMapper
getSourcePlaceableLeaf
public Cell getSourcePlaceableLeaf(Cell parent,
Wire w)
- Overrides:
getSourcePlaceableLeaf
in class TechMapper
getSourceLeafCell
public Cell getSourceLeafCell(Logic parent,
Wire w)
- Overrides:
getSourceLeafCell
in class TechMapper
getSinkLeafCell
public Cell getSinkLeafCell(Logic parent,
Cell c,
Wire w)
- Overrides:
getSinkLeafCell
in class TechMapper
createPlacementInfo
public PlacementInfo createPlacementInfo(Cell c)
- Overrides:
createPlacementInfo
in class TechMapper
getTechMapHint
public java.lang.String getTechMapHint(Logic parent,
Cell c)
- Overrides:
getTechMapHint
in class TechMapper
getTechMapHint
public java.lang.String getTechMapHint(Logic parent,
Wire w)
- Overrides:
getTechMapHint
in class TechMapper
toString
public java.lang.String toString()
padIn
public final void padIn(Cell parent,
boolean clocked,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
- Overrides:
padIn
in class BasicTechMapper
padInR
public void padInR(Cell parent,
boolean clocked,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
padInout
public final void padInout(Cell parent,
boolean clockedIn,
Wire in,
boolean clockedOut,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
- Overrides:
padInout
in class BasicTechMapper
padInoutR
public final void padInoutR(Cell parent,
boolean clockedIn,
Wire in,
boolean clockedOut,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
padOut
public final void padOut(Cell parent,
boolean clocked,
Wire out,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
- Overrides:
padOut
in class BasicTechMapper
padOutR
public void padOutR(Cell parent,
boolean clocked,
Wire out,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
padOutT
public final void padOutT(Cell parent,
boolean clocked,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
- Overrides:
padOutT
in class BasicTechMapper
padClock
public final void padClock(Cell parent,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
- Overrides:
padClock
in class BasicTechMapper
Copyright ? 2006 Brigham Young University, Configurable Computing Laboratory. All Rights Reserved.