byucc.jhdl.Xilinx.Virtex2
Class muxcy_l

java.lang.Object
  extended bybyucc.jhdl.base.Nameable
      extended bybyucc.jhdl.base.Node
          extended bybyucc.jhdl.base.Cell
              extended bybyucc.jhdl.base.CL
                  extended bybyucc.jhdl.Xilinx.Virtex2.muxcy_l
All Implemented Interfaces:
BooleanFlags, PreDefinedSchematic, byucc.jhdl.base.Propagateable, TreeListable

public final class muxcy_l
extends CL
implements PreDefinedSchematic

MUXCY_L is used to implement a 1-bit high-speed carry propagate function. One such function can be implemented per logic cell (LC), for a total of 4-bits per configurable logic block (CLB). The direct input (DI) of an LC is connected to the DI input of the MUXCY. The carry in (CI) input of an LC is connected to the CI input of the MUXCY. The select input (S) of the MUX is driven by the output of the lookup table (LUT) and configured as an XOR function. The carry out (O) of the MUXCY reflects the state of the selected input and implements the carry out function of each LC. When Low, S selects DI; when High, S selects CI. This version has an ouput to local interconnect. (Source: XACT Libraries Guide, Xilinx Corporation, 1991-1998.)


Field Summary
static CellInterface[] cell_interface
          The port interface for: muxcy_l di : in (1) ci : in (1) s : in (1) lo : out (1)
static java.lang.String cellname
          The static cellname (netlist reference name) for muxcy_l
 
Fields inherited from class byucc.jhdl.base.Cell
BOOLEAN, CELL_NAME_DECLARATION, CellInterfaceDeterminesUniqueNetlistStructure, DETERMINE_FROM_STRING, GENERICS_DECLARATION, implicit_interface, IMPLICIT_INTERFACE_DECLARATION, INTEGER, INTERFACE_DECLARATION, LONG, PORT_IOS_DECLARATION, PORT_NAMES_DECLARATION, PORT_NET_NAMES_DECLARATION, PORT_PROPERTIES, PORT_WIDTHS_DECLARATION, SIGN_EXT, STRING, ZERO_PAD
 
Fields inherited from interface byucc.jhdl.apps.Viewers.Schematic.PreDefinedSchematic
PreDefinedSchematic_ADD, PreDefinedSchematic_ADDSUB, PreDefinedSchematic_AND, PreDefinedSchematic_BUF, PreDefinedSchematic_CONST, PreDefinedSchematic_GEN, PreDefinedSchematic_GND, PreDefinedSchematic_INC, PreDefinedSchematic_INV, PreDefinedSchematic_MUX, PreDefinedSchematic_NAND, PreDefinedSchematic_NOR, PreDefinedSchematic_OR, PreDefinedSchematic_PULLDOWN, PreDefinedSchematic_PULLUP, PreDefinedSchematic_REG, PreDefinedSchematic_SHL, PreDefinedSchematic_SHR, PreDefinedSchematic_TBUF, PreDefinedSchematic_VCC, PreDefinedSchematic_XNOR, PreDefinedSchematic_XOR
 
Fields inherited from interface byucc.jhdl.base.BooleanFlags
ANTECEDANT_IS_BEHAVIORALLY_MODELED, ASYNC_PORT, ASYNCHRONOUS_RESOLVED, ATOMICALLY_PLACEABLE, ATOMICALLY_UNMAPPABLE, BEHAVIORALLY_MODELED_BRANCH, CLK_PORT, CLOCK_METHOD_IMPLEMENTED_BY_USER, CLOCK_METHOD_IS_DISABLED, CLOCKABLE_IS_SCHEDULED, DANGLING_IS_OK, DELETE_MARK, FATAL_BUILD_ERROR_OCCURED, HAS_BEEN_TRACED, HAS_USER_SPECIFIED_NAME, HWUPDATE, IMPLICIT_PORT, IN_CLK_PORT, IN_PORT, INOUT_PORT, IO_TYPE_FLAGS, IS_BEHAVIORALLY_MODELED, IS_ON_BUILD_STACK, IS_ON_PROP_LIST, IS_PLACED, METHODS_IMPLEMENTED_BY_USER, NETLISTABLE, ORIG_WIRE_IS_ATOMIC, OUT_PORT, PLACEMENT_IS_LOCKED, PROPAGATE_METHOD_IMPLEMENTED_BY_USER, PROPAGATE_METHOD_IS_DISABLED, RECURSION_FLAG, RESET_METHOD_IMPLEMENTED_BY_USER, SIMULATEABLE, SOURCELESS_IS_OK, SYNC_PORT, VISIBLE
 
Constructor Summary
protected muxcy_l(Node parent)
          Used only by child classes to pass up the parent cell.
  muxcy_l(Node parent, ArgBlockList abl)
          Constructs a new muxcy_l, connecting its ports as given by the String-Wire pairs in the ArgBlockList.
protected muxcy_l(Node parent, java.lang.String name)
          Used only by child classes to pass up the parent cell and instance name.
  muxcy_l(Node parent, java.lang.String instanceName, ArgBlockList abl)
          Constructs a new muxcy_l, connecting its ports as given by the String-Wire pairs in the ArgBlockList.
  muxcy_l(Node parent, java.lang.String instanceName, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3)
          Constructs a new muxcy_l, connecting each Wire to the port whose name is given by the accompanying String parameter The initial String parameter specifies the instance name.
  muxcy_l(Node parent, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3)
          Constructs a new muxcy_l, connecting each Wire to the port whose name is given by the accompanying String parameter
  muxcy_l(Node parent, java.lang.String instanceName, Wire di, Wire ci, Wire s, Wire lo)
          Constructs a new muxcy_l.
  muxcy_l(Node parent, Wire di, Wire ci, Wire s, Wire lo)
          Constructs a new muxcy_l.
 
Method Summary
 boolean cellInterfaceDeterminesUniqueNetlistStructure()
          When false, the default behavior of this method, each cell will list itself separately in a netlist, guaranteeing that the netlist will not have invalid data at the expense of a larger file-size.
 java.lang.String getCellName()
          Access the cell name associated with a derived class.
static void main(java.lang.String[] argv)
           
 void propagate()
          Used for things that are combinationally propagated like combinational logic and Wires and such.
static void test()
           
 int type()
          This method returns one of the predefined schematic constants to identify the type of this cell.
 
Methods inherited from class byucc.jhdl.base.CL
behavioralModelIsAvailable, defaultSimulationModelIsBehavioral, hasBeenTraced, hasBeenTraced, hasBehaviorInClockMethod, hasBehaviorInPropagateMethod, isAsynchronouslyScheduled, isAsynchronouslyScheduled, isReadyToBeAsynchronouslyScheduled, needsToBeAsynchronouslyScheduled
 
Methods inherited from class byucc.jhdl.base.Cell
addPort, addPorts, addProperties, addProperties, addProperty, addProperty, addProperty, addProperty, antecedantIsBehaviorallyModeled, antecedantIsBehaviorallyModeled, bind, bind, bind, bind, clk, connect, connectAllWires, connectOptional, constructSubCell, constructSubCellNoImplicitPorts, disableAllBehavioralModels, disableBehavioralModel, enableBehavioralModel, getArgument, getAttachedPort, getAttachedWire, getAttachedWireNoException, getCellNetlist, getCellNetList, getCellNetlist, getCellNetlist, getDescendents, getFlatNetlist, getFlatNetlistableChildren, getGeneric, getHeight, getNetlistableChildren, getPlacementInfo, getPortProperties, getPortRecord, getPortRecords, getProperties, getProperty, getPropertyValue, getSinkWires, getSourceWires, getSubCellClass, getUniqueCellName, getWidth, getX, getY, hasPort, hasPorts, in, in, inout, inout, isAsynchronousSourceSinkResolved, isBehaviorallyModeled, isBehaviorallyModeledBranch, isInput, isLeafCell, isNetlistable, isNetlistable, isNetlistablePort, isNetlistLeaf, isNotNetlistable, isNotNetlistablePort, isNotVisible, isOutput, isPlaceable, isPlaceable, isPlaced, isPlaced, isPlacementLocked, isRoot, isSimulateable, isSimulateable, isSink, isSource, isVisible, isVisible, join, lockPlacement, nc, out, out, param, popHierarchy, port, port, port, postorderCheck, preorderCheck, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchyNoImplicitPorts, pushHierarchyNoImplicitPorts, removeAllUnconnectedPorts, removePort, removeProperty, replaceProperty, replaceProperty, resetBehavioralModelsToDefaults, setAsynchronousSourceSinkResolved, setGeneric, setHeight, setNotNetlistable, setNotNetlistable, setNotVisible, setNotVisible, setPlacementInfo, setPortNotNetlistable, setPortNotNetlistable, setProperty, setWidth, subClassDelete, toString, uniquifyCell, userDefinedClockCount, verifyAndCleanup
 
Methods inherited from class byucc.jhdl.base.Node
addObservable, addSimulatorCallback, checkAll, delete, getBuildingFlag, getChildren, getChildrenEnumeration, getDefaultClock, getInstanceName, getParent, getParentCell, getRelatives, getSystem, getWires, optimize, orphanAllowed, printAllChildren, printTree, removeSimulatorCallback, setDefaultClock
 
Methods inherited from class byucc.jhdl.base.Nameable
caseSensitivity, caseSensitivity, disableNameClashChecking, getFullName, getFullNameNoTestBench, getHierNameNoTestBench, getInstanceNo, getInstanceNumber, getLeafName, getLeafName, getRelativeName, getUserName, getUserName, hasUserSpecifiedName, isDescendantOf, setInstanceNumber
 
Methods inherited from class java.lang.Object
clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait
 

Field Detail

cellname

public static final java.lang.String cellname
The static cellname (netlist reference name) for muxcy_l

See Also:
Constant Field Values

cell_interface

public static CellInterface[] cell_interface
The port interface for: muxcy_l di : in (1) ci : in (1) s : in (1) lo : out (1)

Constructor Detail

muxcy_l

protected muxcy_l(Node parent)
Used only by child classes to pass up the parent cell.

Parameters:
parent - Parent cell

muxcy_l

protected muxcy_l(Node parent,
                  java.lang.String name)
Used only by child classes to pass up the parent cell and instance name.

Parameters:
parent - Parent cell
name - Instance name of the cell

muxcy_l

public muxcy_l(Node parent,
               Wire di,
               Wire ci,
               Wire s,
               Wire lo)
Constructs a new muxcy_l.

Parameters:
parent - The parent Cell to the muxcy_l
di - The Wire to be connected to input port di
ci - The Wire to be connected to input port ci
s - The Wire to be connected to input port s
lo - The Wire to be connected to output port lo

muxcy_l

public muxcy_l(Node parent,
               java.lang.String instanceName,
               Wire di,
               Wire ci,
               Wire s,
               Wire lo)
Constructs a new muxcy_l. The initial String parameter specifies the instance name.

Parameters:
parent - The parent Cell to the muxcy_l
instanceName - The instance name of the muxcy_l
di - The Wire to be connected to input port di
ci - The Wire to be connected to input port ci
s - The Wire to be connected to input port s
lo - The Wire to be connected to output port lo

muxcy_l

public muxcy_l(Node parent,
               java.lang.String s0,
               Wire w0,
               java.lang.String s1,
               Wire w1,
               java.lang.String s2,
               Wire w2,
               java.lang.String s3,
               Wire w3)
Constructs a new muxcy_l, connecting each Wire to the port whose name is given by the accompanying String parameter

Parameters:
parent - The parent Cell to the muxcy_l
s0 - The name of the port to which w0 will be connected
w0 - The Wire to be connected to the port specified by s0
s1 - The name of the port to which w1 will be connected
w1 - The Wire to be connected to the port specified by s1
s2 - The name of the port to which w2 will be connected
w2 - The Wire to be connected to the port specified by s2
s3 - The name of the port to which w3 will be connected
w3 - The Wire to be connected to the port specified by s3

muxcy_l

public muxcy_l(Node parent,
               java.lang.String instanceName,
               java.lang.String s0,
               Wire w0,
               java.lang.String s1,
               Wire w1,
               java.lang.String s2,
               Wire w2,
               java.lang.String s3,
               Wire w3)
Constructs a new muxcy_l, connecting each Wire to the port whose name is given by the accompanying String parameter The initial String parameter specifies the instance name.

Parameters:
parent - The parent Cell to the muxcy_l
instanceName - The instance name of the muxcy_l
s0 - The name of the port to which w0 will be connected
w0 - The Wire to be connected to the port specified by s0
s1 - The name of the port to which w1 will be connected
w1 - The Wire to be connected to the port specified by s1
s2 - The name of the port to which w2 will be connected
w2 - The Wire to be connected to the port specified by s2
s3 - The name of the port to which w3 will be connected
w3 - The Wire to be connected to the port specified by s3

muxcy_l

public muxcy_l(Node parent,
               ArgBlockList abl)
Constructs a new muxcy_l, connecting its ports as given by the String-Wire pairs in the ArgBlockList. Any generic assignments are made through String-String pairs in the ArgBlockList.

Parameters:
parent - The parent Cell to the muxcy_l
abl - The list of String-Wire pairs for port assignments, and String-String pairs for generic assignments.

muxcy_l

public muxcy_l(Node parent,
               java.lang.String instanceName,
               ArgBlockList abl)
Constructs a new muxcy_l, connecting its ports as given by the String-Wire pairs in the ArgBlockList. Any generic assignments are made through String-String pairs in the ArgBlockList. The initial String parameter is the instance name.

Parameters:
parent - The parent Cell to the muxcy_l
instanceName - The instance name of the muxcy_l
abl - The list of String-Wire pairs for port assignments, and String-String pairs for generic assignments.
Method Detail

getCellName

public java.lang.String getCellName()
Description copied from class: Cell
Access the cell name associated with a derived class. The cellname field is lazily evaluated on the first call of this method. Can be overriden to make cellname different by instance. If the field does not exist, this defaults to the classname.

Overrides:
getCellName in class Cell
Returns:
the cell name associated with a derived class, null if not declared.

propagate

public final void propagate()
Description copied from interface: byucc.jhdl.base.Propagateable
Used for things that are combinationally propagated like combinational logic and Wires and such.

Specified by:
propagate in interface byucc.jhdl.base.Propagateable

type

public int type()
Description copied from interface: PreDefinedSchematic
This method returns one of the predefined schematic constants to identify the type of this cell.

Specified by:
type in interface PreDefinedSchematic
Returns:
A predefined schematic constant

cellInterfaceDeterminesUniqueNetlistStructure

public final boolean cellInterfaceDeterminesUniqueNetlistStructure()
Description copied from class: Cell
When false, the default behavior of this method, each cell will list itself separately in a netlist, guaranteeing that the netlist will not have invalid data at the expense of a larger file-size. Overriding this method to return true allows JHDL to save memory and netlists to be smaller by sharing the netlist structures that are guaranteed to be identical. NOTE: Do not override this unless every possible condition responsible for structural differences in a class (types and amount of children cells created, and arrangements of wires connected to ports) is included in the cellInterface[] of that class.

Overrides:
cellInterfaceDeterminesUniqueNetlistStructure in class Cell
Returns:
false if not overridden, preventing all memory sharing

main

public static void main(java.lang.String[] argv)

test

public static void test()


Copyright ? 2006 Brigham Young University, Configurable Computing Laboratory. All Rights Reserved.