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java.lang.Objectbyucc.jhdl.Logic.BasicTechMapper
byucc.jhdl.Logic.TechMapper
byucc.jhdl.Xilinx.TechMapper
byucc.jhdl.Xilinx.Virtex2.Virtex2TechMapper
This is the tech-mapper for the Virtex2 library. Takes care of instantiating gates for all circuit-methods in the Logic class. Uses a CLBPacker object to resolve all tech-mapping hints.
| Field Summary |
| Fields inherited from class byucc.jhdl.Xilinx.TechMapper |
addedPadsTable, insertTopLevelClockPad |
| Fields inherited from class byucc.jhdl.Logic.TechMapper |
_ignore_placement_calls |
| Fields inherited from interface byucc.jhdl.Logic.TechMapPadInterface |
DEFAULT_INSERT_PADS |
| Constructor Summary | |
Virtex2TechMapper()
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Virtex2TechMapper(boolean tme)
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Virtex2TechMapper(boolean tme,
int reporting_policy)
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Virtex2TechMapper(int reporting_policy)
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| Method Summary | |
void |
add(Cell parent,
Wire a,
Wire b,
Wire s,
java.lang.String name)
|
void |
add(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire s,
Wire co,
java.lang.String name)
|
void |
addsub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire add,
Wire s,
java.lang.String name)
|
void |
addsub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire add,
Wire s,
Wire co,
java.lang.String name)
|
void |
and(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
Wire |
ashiftr(Cell parent,
Wire in,
int shift,
Wire out)
|
void |
buf(Cell parent,
Wire in,
Wire out,
java.lang.String name)
|
Wire |
concat(Cell parent,
Wire[] wa,
java.lang.String name)
|
Wire |
concat(Cell parent,
WireList wl,
java.lang.String name)
|
void |
constant(Cell parent,
Wire out,
BV value,
java.lang.String name)
|
void |
constant(Cell parent,
Wire out,
int value,
java.lang.String name)
|
PlacementInfo |
createPlacementInfo(Cell c)
|
int |
DOWN()
|
java.lang.String |
getLibName()
Returns the name of the library targetted by the particular techmapper. |
java.lang.String |
getRLOCFromPlacementInfo(Cell c)
|
static Cell |
getSinkHierarchicalCell(Cell caller,
Cell par,
Wire w)
|
Cell |
getSinkLeafCell(Logic requester,
Cell par,
Wire w)
Deprecated. Returns any arbitrary leaf cell on the sink list of this wire. |
static Cell |
getSourceHierarchicalCell(Cell caller,
Wire w)
|
Cell |
getSourceLeafCell(Logic requester,
Wire w)
|
Cell |
getSourcePlaceable(Cell requester,
Wire w)
|
Cell |
getSourcePlaceableLeaf(Cell requester,
Wire w)
|
java.lang.String |
getTechMapHint(Logic parent,
Cell c)
|
java.lang.String |
getTechMapHint(Logic parent,
Wire w)
|
void |
gnd(Cell parent,
Wire o,
java.lang.String name)
|
Cell |
map(Logic parent,
Wire[] in,
Wire out,
java.lang.String hints)
|
static boolean |
mapSmallGates()
Method used to determine if small gates (4 inputs or less) are mapped to LUTs, or left unmapped. |
static boolean |
mapSmallGates(boolean state)
Method used to set whether or not small gates are mapped. |
void |
mux(Cell parent,
Wire[] d,
Wire sel,
Wire out,
java.lang.String name)
|
void |
nand(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
void |
nor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
void |
not(Cell parent,
Wire in,
Wire out,
java.lang.String name)
|
void |
or(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
void |
padClock(Cell parent,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
|
void |
padClockR(Cell parent,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
|
void |
padIn(Cell parent,
boolean clocked,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
|
void |
padInout(Cell parent,
boolean clockedIn,
Wire in,
boolean clockedOut,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
padInoutR(Cell parent,
boolean clockedIn,
Wire in,
boolean clockedOut,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
padInR(Cell parent,
boolean clocked,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
|
void |
padOut(Cell parent,
boolean clocked,
Wire out,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
padOutR(Cell parent,
boolean clocked,
Wire out,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
padOutT(Cell parent,
boolean clocked,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
|
void |
place(Logic parent,
Cell c1,
int x,
int y,
java.lang.String hints)
Add placement hints. |
void |
place(Logic parent,
Wire w1,
int x,
int y,
int dx,
int dy,
java.lang.String hints)
Deprecated. This does NOTHING don't use it!!!! |
void |
place(Logic parent,
Wire w,
int x,
int y,
java.lang.String hints)
Add placement hints. |
void |
pulldown(Cell parent,
Wire out,
java.lang.String name)
|
void |
pullup(Cell parent,
Wire out,
java.lang.String name)
|
Wire |
range(Cell parent,
Wire src,
int hi,
int lo)
|
void |
reg(Cell parent,
Wire in,
Wire out,
java.lang.String name)
|
void |
reg(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
|
void |
regc(Cell parent,
Wire in,
Wire out,
java.lang.String name)
|
void |
regc(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
|
void |
regce(Cell parent,
Wire in,
Wire ce,
Wire out,
java.lang.String name)
|
void |
regce(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire out,
java.lang.String name)
|
void |
regp(Cell parent,
Wire in,
Wire out,
java.lang.String name)
|
void |
regp(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
|
void |
regpe(Cell parent,
Wire in,
Wire ce,
Wire out,
java.lang.String name)
|
void |
regpe(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire out,
java.lang.String name)
|
void |
regr(Cell parent,
Wire in,
Wire r,
Wire out,
java.lang.String name)
|
void |
regr(Cell parent,
Wire clk,
Wire in,
Wire r,
Wire out,
java.lang.String name)
|
void |
regre(Cell parent,
Wire in,
Wire ce,
Wire r,
Wire out,
java.lang.String name)
|
void |
regre(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire r,
Wire out,
java.lang.String name)
|
void |
regs(Cell parent,
Wire in,
Wire s,
Wire out,
java.lang.String name)
|
void |
regs(Cell parent,
Wire clk,
Wire in,
Wire s,
Wire out,
java.lang.String name)
|
void |
regse(Cell parent,
Wire in,
Wire ce,
Wire s,
Wire out,
java.lang.String name)
|
void |
regse(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire s,
Wire out,
java.lang.String name)
|
Wire |
shiftl(Cell parent,
Wire in,
int shift,
Wire out)
|
Wire |
shiftr(Cell parent,
Wire in,
int shift,
Wire out)
|
Cell |
sink(Logic caller,
Wire w1,
Cell c1)
Deprecated. use getSinkLeafCell |
Cell |
source(Logic caller,
Wire w1)
Deprecated. use getSourcePlaceable(byucc.jhdl.base.Cell, byucc.jhdl.base.Wire), getSourcePlaceableLeaf(byucc.jhdl.base.Cell, byucc.jhdl.base.Wire), or
getSourceLeafCell(byucc.jhdl.Logic.Logic, byucc.jhdl.base.Wire) |
void |
sub(Cell parent,
Wire a,
Wire b,
Wire s,
java.lang.String name)
|
void |
sub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire s,
Wire co,
java.lang.String name)
|
void |
tbuf(Cell parent,
Wire in,
Wire en,
Wire out,
java.lang.String name)
|
java.lang.String |
toString()
|
int |
UP()
|
void |
vcc(Cell parent,
Wire o,
java.lang.String name)
|
Wire |
wire(Cell p,
int width,
java.lang.String name)
|
Wire |
wire(Cell p,
java.lang.String name)
|
void |
xnor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
void |
xor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
|
| Methods inherited from class byucc.jhdl.Logic.TechMapper |
ALIGN_BOTTOM, ALIGN_LEFT, ALIGN_LSB, ALIGN_MSB, ALIGN_RIGHT, ALIGN_TOP, getIgnorePlacementCalls, getInsertTechMapHints, netlist, setIgnorePlacementCalls, setInsertTechMapHints, TOLEFT, TORIGHT |
| Methods inherited from class byucc.jhdl.Logic.BasicTechMapper |
getTechnology, netlist, netlist, setTechnology, unsupportedComponent |
| Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait |
| Constructor Detail |
public Virtex2TechMapper()
public Virtex2TechMapper(int reporting_policy)
public Virtex2TechMapper(boolean tme)
public Virtex2TechMapper(boolean tme,
int reporting_policy)
| Method Detail |
public static boolean mapSmallGates()
public static boolean mapSmallGates(boolean state)
state - Set to true if small gates should be mapped, false
if they should not.public java.lang.String getLibName()
TechMapper
getLibName in class TechMapper
public final void padClock(Cell parent,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
padClock in class BasicTechMapper
public final void padClockR(Cell parent,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
public final void padIn(Cell parent,
boolean clocked,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
padIn in class BasicTechMapper
public final void padInR(Cell parent,
boolean clocked,
Wire pad,
Wire in,
java.lang.String[] mods,
java.lang.String name)
public final void padInout(Cell parent,
boolean clockedIn,
Wire in,
boolean clockedOut,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
padInout in class BasicTechMapper
public final void padInoutR(Cell parent,
boolean clockedIn,
Wire in,
boolean clockedOut,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
public final void padOut(Cell parent,
boolean clocked,
Wire out,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
padOut in class BasicTechMapper
public final void padOutR(Cell parent,
boolean clocked,
Wire out,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
public final void padOutT(Cell parent,
boolean clocked,
Wire out,
Wire ctl,
Wire pad,
java.lang.String[] mods,
java.lang.String name)
padOutT in class BasicTechMapper
public final void buf(Cell parent,
Wire in,
Wire out,
java.lang.String name)
buf in class BasicTechMapper
public final void tbuf(Cell parent,
Wire in,
Wire en,
Wire out,
java.lang.String name)
tbuf in class BasicTechMapper
public final void not(Cell parent,
Wire in,
Wire out,
java.lang.String name)
not in class BasicTechMapper
public final void vcc(Cell parent,
Wire o,
java.lang.String name)
vcc in class BasicTechMapper
public final void gnd(Cell parent,
Wire o,
java.lang.String name)
gnd in class BasicTechMapper
public final void pullup(Cell parent,
Wire out,
java.lang.String name)
pullup in class BasicTechMapper
public final void pulldown(Cell parent,
Wire out,
java.lang.String name)
pulldown in class BasicTechMapper
public Wire wire(Cell p,
java.lang.String name)
wire in class BasicTechMapper
public Wire wire(Cell p,
int width,
java.lang.String name)
wire in class BasicTechMapper
public Wire concat(Cell parent,
Wire[] wa,
java.lang.String name)
concat in class BasicTechMapper
public Wire concat(Cell parent,
WireList wl,
java.lang.String name)
concat in class BasicTechMapper
public Wire range(Cell parent,
Wire src,
int hi,
int lo)
range in class BasicTechMapper
public void constant(Cell parent,
Wire out,
int value,
java.lang.String name)
constant in class BasicTechMapper
public void constant(Cell parent,
Wire out,
BV value,
java.lang.String name)
constant in class BasicTechMapper
public final void mux(Cell parent,
Wire[] d,
Wire sel,
Wire out,
java.lang.String name)
mux in class BasicTechMapper
public final void and(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
and in class BasicTechMapper
public final void or(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
or in class BasicTechMapper
public final void xor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
xor in class BasicTechMapper
public final void nand(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
nand in class BasicTechMapper
public final void nor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
nor in class BasicTechMapper
public final void xnor(Cell parent,
Wire[] in,
Wire out,
java.lang.String name)
xnor in class BasicTechMapper
public final void reg(Cell parent,
Wire in,
Wire out,
java.lang.String name)
reg in class BasicTechMapper
public final void regc(Cell parent,
Wire in,
Wire out,
java.lang.String name)
regc in class TechMapper
public final void regp(Cell parent,
Wire in,
Wire out,
java.lang.String name)
regp in class TechMapper
public void regr(Cell parent,
Wire in,
Wire r,
Wire out,
java.lang.String name)
regr in class TechMapper
public void regre(Cell parent,
Wire in,
Wire ce,
Wire r,
Wire out,
java.lang.String name)
regre in class TechMapper
public void regs(Cell parent,
Wire in,
Wire s,
Wire out,
java.lang.String name)
regs in class TechMapper
public void regse(Cell parent,
Wire in,
Wire ce,
Wire s,
Wire out,
java.lang.String name)
regse in class TechMapper
public final void reg(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
reg in class BasicTechMapper
public final void regc(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
regc in class TechMapper
public final void regp(Cell parent,
Wire clk,
Wire in,
Wire out,
java.lang.String name)
regp in class TechMapper
public final void regr(Cell parent,
Wire clk,
Wire in,
Wire r,
Wire out,
java.lang.String name)
regr in class TechMapper
public void regs(Cell parent,
Wire clk,
Wire in,
Wire s,
Wire out,
java.lang.String name)
regs in class TechMapper
public void regse(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire s,
Wire out,
java.lang.String name)
regse in class TechMapper
public void regre(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire r,
Wire out,
java.lang.String name)
regre in class TechMapper
public final void regce(Cell parent,
Wire in,
Wire ce,
Wire out,
java.lang.String name)
regce in class TechMapper
public final void regpe(Cell parent,
Wire in,
Wire ce,
Wire out,
java.lang.String name)
regpe in class TechMapper
public final void regce(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire out,
java.lang.String name)
regce in class TechMapper
public final void regpe(Cell parent,
Wire clk,
Wire in,
Wire ce,
Wire out,
java.lang.String name)
regpe in class TechMapper
public void add(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire s,
Wire co,
java.lang.String name)
add in class BasicTechMapper
public void sub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire s,
Wire co,
java.lang.String name)
sub in class BasicTechMapper
public void addsub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire add,
Wire s,
Wire co,
java.lang.String name)
addsub in class BasicTechMapper
public void add(Cell parent,
Wire a,
Wire b,
Wire s,
java.lang.String name)
add in class BasicTechMapper
public void sub(Cell parent,
Wire a,
Wire b,
Wire s,
java.lang.String name)
sub in class BasicTechMapper
public void addsub(Cell parent,
Wire a,
Wire b,
Wire ci,
Wire add,
Wire s,
java.lang.String name)
addsub in class BasicTechMapper
public Wire ashiftr(Cell parent,
Wire in,
int shift,
Wire out)
ashiftr in class BasicTechMapper
public Wire shiftr(Cell parent,
Wire in,
int shift,
Wire out)
shiftr in class BasicTechMapper
public Wire shiftl(Cell parent,
Wire in,
int shift,
Wire out)
shiftl in class BasicTechMapper
public final Cell map(Logic parent,
Wire[] in,
Wire out,
java.lang.String hints)
map in class TechMapperpublic java.lang.String getRLOCFromPlacementInfo(Cell c)
getRLOCFromPlacementInfo in class TechMapper
public static Cell getSourceHierarchicalCell(Cell caller,
Wire w)
public static Cell getSinkHierarchicalCell(Cell caller,
Cell par,
Wire w)
public Cell getSourcePlaceable(Cell requester,
Wire w)
getSourcePlaceable in class TechMapper
public Cell getSourcePlaceableLeaf(Cell requester,
Wire w)
getSourcePlaceableLeaf in class TechMapper
public Cell getSourceLeafCell(Logic requester,
Wire w)
getSourceLeafCell in class TechMapper
public Cell getSinkLeafCell(Logic requester,
Cell par,
Wire w)
getSinkLeafCell in class TechMapper
public Cell source(Logic caller,
Wire w1)
getSourcePlaceable(byucc.jhdl.base.Cell, byucc.jhdl.base.Wire), getSourcePlaceableLeaf(byucc.jhdl.base.Cell, byucc.jhdl.base.Wire), or
getSourceLeafCell(byucc.jhdl.Logic.Logic, byucc.jhdl.base.Wire)
public Cell sink(Logic caller,
Wire w1,
Cell c1)
public PlacementInfo createPlacementInfo(Cell c)
createPlacementInfo in class TechMapper
public final void place(Logic parent,
Cell c1,
int x,
int y,
java.lang.String hints)
place in class TechMapper
public final void place(Logic parent,
Wire w,
int x,
int y,
java.lang.String hints)
place in class TechMapper
public final void place(Logic parent,
Wire w1,
int x,
int y,
int dx,
int dy,
java.lang.String hints)
place in class TechMapper
public java.lang.String getTechMapHint(Logic parent,
Cell c)
getTechMapHint in class TechMapper
public java.lang.String getTechMapHint(Logic parent,
Wire w)
getTechMapHint in class TechMapperpublic java.lang.String toString()
public int UP()
UP in class TechMapperpublic int DOWN()
DOWN in class TechMapper
|
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| SUMMARY: NESTED | FIELD | CONSTR | METHOD | DETAIL: FIELD | CONSTR | METHOD | ||||||||||