byucc.jhdl.Xilinx.Virtex2.Modules.FloatingPoint
Class FPDivide
java.lang.Object
byucc.jhdl.base.Nameable
byucc.jhdl.base.Node
byucc.jhdl.base.Cell
byucc.jhdl.base.Structural
byucc.jhdl.Logic.LogicGates
byucc.jhdl.Logic.LogicStatic
byucc.jhdl.Logic.Logic
byucc.jhdl.Xilinx.Virtex2.Modules.FloatingPoint.FPDivide
- All Implemented Interfaces:
- BooleanFlags, Clockable, Pipelineable, byucc.jhdl.base.Propagateable, TreeListable
- public class FPDivide
- extends Logic
- implements Pipelineable
Floating-point divider.
For all available constructors, see
Constructor Summary or
Constructor Detail.
General Description
FPDivide is a floating-point divider with generic exponent
and significand sizes.
FPDivide takes two floating-point inputs of the same width.
It divides them and outputs the quotient.
The quotient has the same width as the inputs.
FPDivide rounds the result using the "round to nearest even"
rounding mode.
This is the standard rounding mode on computers.
To learn about the floating-point format, see the
FloatingPoint package summary.
Implementation
The floating-point divider subtracts the exponents,
divides the significands, and handles special cases
The significand division is done using an integer divider.
The divider may be pipelined. Pipelining is recommended, since it
greatly improves the maximum clock rate.
In addition, the floating-point divider handles several special cases.
Special Cases
Dividend / | Divisor = | Quotient | Exceptions4
|
Normal1
| Normal
| Normal |
|
Infinity3 | Overflow
|
0.0 | Underflow
|
NaN | anything | NaN |
|
anything | NaN | NaN |
|
0.0 | 0.0 | NaN | Invalid Operation
|
Infinity | Infinity | NaN |
|
Normal | 0.0 | Infinity | Division by Zero
|
Infinity | 0.0 | Infinity | Invalid Operation
|
Infinity | Normal | Infinity |
|
0.0 | Normal | 0.0 |
|
0.0 | Infinity | 0.0 |
|
Normal | Infinity | 0.0 |
|
Notes
1 Signs are not included in this table.
The sign of the result depends on the signs of the operands.
2 In this table, "Normal" means a nonzero finite floating-point
representation of a value.
3 In the IEEE floating-point standard, the result of overflow actually depends
on the rounding mode. If the rounding mode is "round to nearest / even," then
an overflow results in an infinity. If the rounding mode is "round to zero,"
then an overflow results in the largest representable finite number. Other
modes behave differently. (See the IEEE specification.)
The value shown in this table is the value actually returned by this module.
4 This module does not currently support these exceptions. They
are listed as a guide for possible future expansion.
The IEEE exceptions are:
- Invalid Operation
- Division by Zero
- Overflow
- Underflow
- Inexact (this should be implemented assuming no overflow trap)
The conditions for these exceptions are given in the IEEE specification.
Block Diagram
- Version:
- $Revision: 1.1 $
- Author:
- Aaron Stewart
Fields inherited from class byucc.jhdl.Logic.Logic |
ABOVE, ALIGN_BOTTOM, ALIGN_CENTER, ALIGN_LEFT, ALIGN_LSB, ALIGN_MSB, ALIGN_RIGHT, ALIGN_TOP, BELOW, DOWN, EAST_OF, LEFT_OF, MAX_PACK, NORTH_OF, ON, ONTOP, ONTOP_OF, RIGHT_OF, SOUTH_OF, TOLEFT, TORIGHT, UNCONSTRAINED, UP, WEST_OF |
Fields inherited from class byucc.jhdl.base.Cell |
BOOLEAN, CELL_NAME_DECLARATION, CellInterfaceDeterminesUniqueNetlistStructure, DETERMINE_FROM_STRING, GENERICS_DECLARATION, implicit_interface, IMPLICIT_INTERFACE_DECLARATION, INTEGER, INTERFACE_DECLARATION, LONG, PORT_IOS_DECLARATION, PORT_NAMES_DECLARATION, PORT_NET_NAMES_DECLARATION, PORT_PROPERTIES, PORT_WIDTHS_DECLARATION, SIGN_EXT, STRING, ZERO_PAD |
Fields inherited from interface byucc.jhdl.base.BooleanFlags |
ANTECEDANT_IS_BEHAVIORALLY_MODELED, ASYNC_PORT, ASYNCHRONOUS_RESOLVED, ATOMICALLY_PLACEABLE, ATOMICALLY_UNMAPPABLE, BEHAVIORALLY_MODELED_BRANCH, CLK_PORT, CLOCK_METHOD_IMPLEMENTED_BY_USER, CLOCK_METHOD_IS_DISABLED, CLOCKABLE_IS_SCHEDULED, DANGLING_IS_OK, DELETE_MARK, FATAL_BUILD_ERROR_OCCURED, HAS_BEEN_TRACED, HAS_USER_SPECIFIED_NAME, HWUPDATE, IMPLICIT_PORT, IN_CLK_PORT, IN_PORT, INOUT_PORT, IO_TYPE_FLAGS, IS_BEHAVIORALLY_MODELED, IS_ON_BUILD_STACK, IS_ON_PROP_LIST, IS_PLACED, METHODS_IMPLEMENTED_BY_USER, NETLISTABLE, ORIG_WIRE_IS_ATOMIC, OUT_PORT, PLACEMENT_IS_LOCKED, PROPAGATE_METHOD_IMPLEMENTED_BY_USER, PROPAGATE_METHOD_IS_DISABLED, RECURSION_FLAG, RESET_METHOD_IMPLEMENTED_BY_USER, SIMULATEABLE, SOURCELESS_IS_OK, SYNC_PORT, VISIBLE |
Constructor Summary |
FPDivide(Node parent,
Wire dividend_in,
Wire divisor_in,
Wire quotient,
Wire overflow_out,
Wire underflow_out,
int exponentWidth,
int pipelining)
Builds a floating-point divider without exception flags. |
FPDivide(Node parent,
Wire dividend_in,
Wire divisor_in,
Wire quotient,
Wire overflow_out,
Wire underflow_out,
int exponentWidth,
int pipelining,
java.lang.String instanceName)
Builds a floating-point divider. |
Methods inherited from class byucc.jhdl.Logic.Logic |
clockDriver, clockDriver, connect_implicit_ports, connectImplicitPorts, constructSubCell, constructSubCellNoImplicitPorts, enableNewPlacement, enableNewPlacement, extend, extend, getDefaultClock, getDefaultTechMapper, getGlobalClock, getSinkCell, getSourceCell, getSourceCell, getSourceLeaf, getSourcePlaceable, getSourcePlaceableLeaf, getSubCellClass, getTechMapHint, getTechMapHint, getTechMapper, growAndShiftl, lockChildPlacement, lsb, lsb, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, msb, msb, msbIndx, netlist, netlist, netlist, netlist, netlist, netlist, netlist, netlist, padClock_o, padClock_o, padClock_o, padClock, padClock, padClock, padIn_o, padIn_o, padIn_o, padIn, padIn, padIn, padInout_o, padInout_o, padInout_o, padInout, padInout, padInout, padOut_o, padOut_o, padOut_o, padOut, padOut, padOut, padOutT_o, padOutT_o, padOutT_o, padOutT, padOutT, padOutT, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, printTechMapHints, range, rotate, rotate, scale, scale, setBBox, setDefaultTechMapper, setFloorPlannerIsMaster, setTechMappingEnabled, setWandH, signExtend_o, signExtend, signExtend, sink, source, takeBot_o, takeBot, takeBot, takeBotSigned_o, takeBotSigned, takeTop_o, takeTop, takeTop, techmap, techMappingEnabled, translate, translate, zeroExtend_o, zeroExtend, zeroExtend, zeroExtendRight_o, zeroExtendRight |
Methods inherited from class byucc.jhdl.Logic.LogicStatic |
add_o, add_o, and_o, and_o, and, and, buf_o, buf_o, buf, buf, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux, nc, nc, nc, nc, nc, nc, not_o, not_o, not, not, or_o, or_o, or, or, reg_o, reg, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor, xor_o, xor |
Methods inherited from class byucc.jhdl.Logic.LogicGates |
add_o, add_o, add_o, add_o, add_o, add_o, add, add, add, add, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub, addsub, addsub, addsub, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, ashiftr_o, ashiftr, ashiftr, buf_o, buf_o, buf, buf, checkValueRepresentableInWidth, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux_o, mux_o, mux_o, mux_o, mux_o, mux, mux, mux, mux, mux, mux, name, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nc, nc, nc, nc, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, not_o, not_o, not, not, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, pulldown, pulldown, pullup, pullup, reg_o, reg_o, reg_o, reg_o, reg, reg, reg, reg, regc_o, regc_o, regc_o, regc_o, regc, regc, regc, regc, regce_o, regce_o, regce_o, regce_o, regce, regce, regce, regce, regp_o, regp_o, regp_o, regp_o, regp, regp, regp, regp, regpe_o, regpe_o, regpe_o, regpe_o, regpe, regpe, regpe, regpe, regr_o, regr_o, regr_o, regr_o, regr, regr, regr, regr, regre_o, regre_o, regre_o, regre_o, regre, regre, regre, regre, regs_o, regs_o, regs_o, regs_o, regs, regs, regs, regs, regse_o, regse_o, regse_o, regse_o, regse, regse, regse, regse, shiftl_o, shiftl, shiftl, shiftr_o, shiftr, shiftr, sub_o, sub_o, sub_o, sub_o, sub_o, sub_o, sub, sub, sub, sub, tbuf_o, tbuf_o, tbuf, tbuf, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor |
Methods inherited from class byucc.jhdl.base.Structural |
behavioralModelIsAvailable, clockMethodIsDisabled, clockMethodIsDisabled, clockMethodIsEnabled, clockMethodIsEnabled, hasBeenTraced, hasBeenTraced, hasBehaviorInClockMethod, hasBehaviorInPropagateMethod, isAsynchronouslyScheduled, isAsynchronouslyScheduled, isFallingEdgeTriggered, isReadyToBeAsynchronouslyScheduled, isRisingEdgeTriggered, needsToBeAsynchronouslyScheduled, needsToBeClocked, propagateMethodIsDisabled, propagateMethodIsDisabled, propagateMethodIsEnabled, propagateMethodIsEnabled, willUseHWUpdate, willUseHWUpdate |
Methods inherited from class byucc.jhdl.base.Cell |
addPort, addPorts, addProperties, addProperties, addProperty, addProperty, addProperty, addProperty, antecedantIsBehaviorallyModeled, antecedantIsBehaviorallyModeled, bind, bind, bind, bind, cellInterfaceDeterminesUniqueNetlistStructure, clk, connect, connectAllWires, connectOptional, disableAllBehavioralModels, disableBehavioralModel, enableBehavioralModel, getArgument, getAttachedPort, getAttachedWire, getAttachedWireNoException, getCellNetlist, getCellNetList, getCellNetlist, getCellNetlist, getDescendents, getFlatNetlist, getFlatNetlistableChildren, getGeneric, getHeight, getNetlistableChildren, getPlacementInfo, getPortProperties, getPortRecord, getPortRecords, getProperties, getProperty, getPropertyValue, getSinkWires, getSourceWires, getUniqueCellName, getWidth, getX, getY, hasPort, hasPorts, in, in, inout, inout, isAsynchronousSourceSinkResolved, isBehaviorallyModeled, isBehaviorallyModeledBranch, isInput, isLeafCell, isNetlistable, isNetlistable, isNetlistablePort, isNetlistLeaf, isNotNetlistable, isNotNetlistablePort, isNotVisible, isOutput, isPlaceable, isPlaceable, isPlaced, isPlaced, isPlacementLocked, isRoot, isSimulateable, isSimulateable, isSink, isSource, isVisible, isVisible, join, lockPlacement, nc, out, out, param, popHierarchy, port, port, port, postorderCheck, preorderCheck, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchyNoImplicitPorts, pushHierarchyNoImplicitPorts, removeAllUnconnectedPorts, removePort, removeProperty, replaceProperty, replaceProperty, resetBehavioralModelsToDefaults, setAsynchronousSourceSinkResolved, setGeneric, setHeight, setNotNetlistable, setNotNetlistable, setNotVisible, setNotVisible, setPlacementInfo, setPortNotNetlistable, setPortNotNetlistable, setProperty, setWidth, subClassDelete, toString, uniquifyCell, userDefinedClockCount, verifyAndCleanup |
Methods inherited from class byucc.jhdl.base.Node |
addObservable, addSimulatorCallback, checkAll, delete, getBuildingFlag, getChildren, getChildrenEnumeration, getInstanceName, getParent, getParentCell, getRelatives, getSystem, getWires, optimize, orphanAllowed, printAllChildren, printTree, removeSimulatorCallback, setDefaultClock |
Methods inherited from class byucc.jhdl.base.Nameable |
caseSensitivity, caseSensitivity, disableNameClashChecking, getFullName, getFullNameNoTestBench, getHierNameNoTestBench, getInstanceNo, getInstanceNumber, getLeafName, getLeafName, getRelativeName, getUserName, getUserName, hasUserSpecifiedName, isDescendantOf, setInstanceNumber |
Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait |
cell_interface
public static CellInterface[] cell_interface
cellname
public static final java.lang.String cellname
- See Also:
- Constant Field Values
ROUND_TO_NEAREST
public static final int ROUND_TO_NEAREST
- A constant for the default rounding mode: Round to nearest.
If the value is exactly at the halfway point,
it is rounded up (incremented) if odd,
or down (truncated) if even,
so that the resulting bit pattern is even.
This "tie breaker" is designed to prevent the roundoff error
from being biased in a particular direction. This may make a
difference in long or repeated computations.
Examples (binary):
- 01.100001 is rounded up to 10.
- 01.100000 is rounded up to 10.
- 10.100000 is rounded down to 10.
- 01.0xxxxx is rounded down to 01.
- See Also:
- Constant Field Values
ROUND_TOWARD_ZERO
public static final int ROUND_TOWARD_ZERO
- A constant for truncation mode (no rounding).
This is also called "round toward zero".
Example (binary):
- 01.xxxxx is always rounded to 01.
- See Also:
- Constant Field Values
FPDivide
public FPDivide(Node parent,
Wire dividend_in,
Wire divisor_in,
Wire quotient,
Wire overflow_out,
Wire underflow_out,
int exponentWidth,
int pipelining)
- Builds a floating-point divider without exception flags.
Use the
getLatency()
method of the cell to determine
the number of pipeline stages.
Example:
int latency = new Divider (this, dividend, divisor, quotient, pipelining, exponentWidth, "MyDivider") . getLatency();
FPDivide
public FPDivide(Node parent,
Wire dividend_in,
Wire divisor_in,
Wire quotient,
Wire overflow_out,
Wire underflow_out,
int exponentWidth,
int pipelining,
java.lang.String instanceName)
- Builds a floating-point divider.
Use the
getLatency()
method of the cell to determine
the number of pipeline stages.
Example:
int latency = new Divider (this, dividend, divisor, quotient, overflow_out, underflow_out, pipelining, exponentWidth, "MyDivider") . getLatency();
defaultSimulationModelIsBehavioral
protected boolean defaultSimulationModelIsBehavioral()
- The default simulation model is behavioral
- Overrides:
defaultSimulationModelIsBehavioral
in class Structural
- Returns:
- true if TestBench or leafCell, false otherwise.
getCellName
public java.lang.String getCellName()
- Returns the cellname.
- Overrides:
getCellName
in class Cell
- Returns:
- the cell name associated with a derived class, null if not declared.
getLatency
public int getLatency()
- Returns the latency of the design.
- Specified by:
getLatency
in interface Pipelineable
- Returns:
- The number of clock cycles from the time valid inputs appear
until the outputs appear.
If the circuit is fully combinational, zero is returned.
getIntDivideLatency
public int getIntDivideLatency()
getInputLatency
public int getInputLatency()
reset
public void reset()
- Used by the simulator.
This is part of the behavioral model, for clocked logic.
- Specified by:
reset
in interface Clockable
- Overrides:
reset
in class Structural
clock
public void clock()
- Used by the simulator.
This is part of the behavioral model, for clocked logic.
- Specified by:
clock
in interface Clockable
- Overrides:
clock
in class Structural
propagate
public void propagate()
- Used by the simulator.
This is part of the behavioral model, for combinational logic.
- Specified by:
propagate
in interface byucc.jhdl.base.Propagateable
- Overrides:
propagate
in class Structural
compute
public BV[] compute(BV dividend,
BV divisor,
int width,
int exponentWidth,
int mantSize)
- Used in behavioral model to compute the output
- Returns:
- An array containing
[0]: the quotient,
[1]: the status bits: OVERFLOW_MASK, UNDERFLOW_MASK, DIVIDE_BY_ZERO_MASK
Copyright ? 2006 Brigham Young University, Configurable Computing Laboratory. All Rights Reserved.