byucc.jhdl.Logic.Modules.helpers
Class tb_Template

java.lang.Object
  byucc.jhdl.base.Nameable
      byucc.jhdl.base.Node
          byucc.jhdl.base.Cell
              byucc.jhdl.base.Structural
                  byucc.jhdl.Logic.LogicGates
                      byucc.jhdl.Logic.LogicStatic
                          byucc.jhdl.Logic.Logic
                              byucc.jhdl.Logic.Modules.helpers.tb_Template

All Implemented Interfaces:

BooleanFlags, Clockable, ProgrammaticTestBench, byucc.jhdl.base.Propagateable, TestBench, TreeListable

public abstract class tb_Template

extends Logic

implements ProgrammaticTestBench

Generic superclass for Module testbenches. This is a helper class for creating testbenches which compare the structural and behavioral models of a Cell.

Field Summary

protected static int	ARG_MASK
protected java.lang.String[]	b_outputNames
protected BV[]	b_outputValues
protected static boolean	continueOnFailure
protected static int	FIXED
protected static int	FIXED_BIAS
protected static int	FIXED_MASK
protected static int	FLOAT
protected java.lang.String[]	inputNames
protected BV[][]	inputValues inputValues[steps_ago][input_index] are the input values that were put onto wires.
protected static boolean	interactive
protected static int	iterations
protected java.lang.String[]	outputNames
protected BV[]	outputValues
protected java.util.Random	random A random number generator
protected static int	SIGNED
protected static int	UNSIGNED
protected static boolean	verbose

Fields inherited from class byucc.jhdl.Logic.Logic

ABOVE, ALIGN_BOTTOM, ALIGN_CENTER, ALIGN_LEFT, ALIGN_LSB, ALIGN_MSB, ALIGN_RIGHT, ALIGN_TOP, BELOW, DOWN, EAST_OF, LEFT_OF, MAX_PACK, NORTH_OF, ON, ONTOP, ONTOP_OF, RIGHT_OF, SOUTH_OF, TOLEFT, TORIGHT, UNCONSTRAINED, UP, WEST_OF

Fields inherited from class byucc.jhdl.Logic.LogicGates

tech_mapper

Fields inherited from class byucc.jhdl.base.Cell

BOOLEAN, CELL_NAME_DECLARATION, CellInterfaceDeterminesUniqueNetlistStructure, DETERMINE_FROM_STRING, GENERICS_DECLARATION, implicit_interface, IMPLICIT_INTERFACE_DECLARATION, INTEGER, INTERFACE_DECLARATION, LONG, PORT_IOS_DECLARATION, PORT_NAMES_DECLARATION, PORT_NET_NAMES_DECLARATION, PORT_PROPERTIES, PORT_WIDTHS_DECLARATION, SIGN_EXT, STRING, ZERO_PAD

Fields inherited from interface byucc.jhdl.base.BooleanFlags

ANTECEDANT_IS_BEHAVIORALLY_MODELED, ASYNC_PORT, ASYNCHRONOUS_RESOLVED, ATOMICALLY_PLACEABLE, ATOMICALLY_UNMAPPABLE, BEHAVIORALLY_MODELED_BRANCH, CLK_PORT, CLOCK_METHOD_IMPLEMENTED_BY_USER, CLOCK_METHOD_IS_DISABLED, CLOCKABLE_IS_SCHEDULED, DANGLING_IS_OK, DELETE_MARK, FATAL_BUILD_ERROR_OCCURED, HAS_BEEN_TRACED, HAS_USER_SPECIFIED_NAME, HWUPDATE, IMPLICIT_PORT, IN_CLK_PORT, IN_PORT, INOUT_PORT, IO_TYPE_FLAGS, IS_BEHAVIORALLY_MODELED, IS_ON_BUILD_STACK, IS_ON_PROP_LIST, IS_PLACED, METHODS_IMPLEMENTED_BY_USER, NETLISTABLE, ORIG_WIRE_IS_ATOMIC, OUT_PORT, PLACEMENT_IS_LOCKED, PROPAGATE_METHOD_IMPLEMENTED_BY_USER, PROPAGATE_METHOD_IS_DISABLED, RECURSION_FLAG, RESET_METHOD_IMPLEMENTED_BY_USER, SIMULATEABLE, SOURCELESS_IS_OK, SYNC_PORT, VISIBLE

Constructor Summary

tb_Template(Node parent)
Override this with a constructor that starts with "super (parent);"

Method Summary

protected void	bindBehavior(Wire[] wa) Tells the testbench template about the output wires from the behavioral model
protected void	bindInputs(Wire[] wa) Tells the testbench template about the input wires.
protected void	bindInputTypes(int[] types) Allows the user to specify input types, such as SIGNED, UNSIGNED, FLOAT, etc.
protected void	bindOutputs(Wire[] wa) Tells the testbench template about the output wires from the structural model
protected void	bindOutputSigns(boolean[] signed) Allows the user to specify which outputs are signed and which are unsigned, so that they appear correctly in the text output.
protected void	bindOutputTypes(int[] types) Allows the user to specify output types, such as SIGNED, UNSIGNED, FLOAT, etc.
protected void	buildNetlist(Cell cell, boolean xBuild) Generates an EDIF netlist and optionally builds the design.
void	clock() Puts values on the input wires when the circuit is clocked (called by getSystem().cycle(1) )
void	execute() The heart of the programmatic testbench.
protected double	fixedToDouble(BV bv, int bitsRightOfRadixPoint)
protected BV	getCorrespondingInput(Wire wire) Returns the input on the wire from several cycles ago, so that the input value corresponds to the current output, even if the circuit is pipelined.
protected int	getLatency() Override this to return the latency of the design.
protected java.lang.String[][][]	getTestVector() (Optional) Override this to return the user-defined test vector.
protected void	getValues() After a clock cycle, read the output wire values into variables
void	reset() Puts values on the input wires when the circuit is reset (called by getSystem().reset() )
protected java.lang.String	resultsToString() Shows the input and output results as a String
protected boolean	runTestVector() User-defined test vector
protected boolean	userTests() Override this with a function to check for failure (Optional).

Methods inherited from class byucc.jhdl.Logic.Logic

clockDriver, clockDriver, connect_implicit_ports, connectImplicitPorts, constructSubCell, constructSubCellNoImplicitPorts, enableNewPlacement, enableNewPlacement, extend, extend, getDefaultClock, getDefaultTechMapper, getGlobalClock, getSinkCell, getSourceCell, getSourceCell, getSourceLeaf, getSourcePlaceable, getSourcePlaceableLeaf, getSubCellClass, getTechMapHint, getTechMapHint, getTechMapper, growAndShiftl, lockChildPlacement, lsb, lsb, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, msb, msb, msbIndx, netlist, netlist, netlist, netlist, netlist, netlist, netlist, netlist, padClock_o, padClock_o, padClock_o, padClock, padClock, padClock, padIn_o, padIn_o, padIn_o, padIn, padIn, padIn, padInout_o, padInout_o, padInout_o, padInout, padInout, padInout, padOut_o, padOut_o, padOut_o, padOut, padOut, padOut, padOutT_o, padOutT_o, padOutT_o, padOutT, padOutT, padOutT, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, printTechMapHints, range, rotate, rotate, scale, scale, setBBox, setDefaultTechMapper, setFloorPlannerIsMaster, setTechMappingEnabled, setWandH, signExtend_o, signExtend, signExtend, sink, source, takeBot_o, takeBot, takeBot, takeBotSigned_o, takeBotSigned, takeTop_o, takeTop, takeTop, techmap, techMappingEnabled, translate, translate, zeroExtend_o, zeroExtend, zeroExtend, zeroExtendRight_o, zeroExtendRight

Methods inherited from class byucc.jhdl.Logic.LogicStatic

add_o, add_o, and_o, and_o, and, and, buf_o, buf_o, buf, buf, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux, nc, nc, nc, nc, nc, nc, not_o, not_o, not, not, or_o, or_o, or, or, reg_o, reg, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor, xor_o, xor

Methods inherited from class byucc.jhdl.Logic.LogicGates

add_o, add_o, add_o, add_o, add_o, add_o, add, add, add, add, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub, addsub, addsub, addsub, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, ashiftr_o, ashiftr, ashiftr, buf_o, buf_o, buf, buf, checkValueRepresentableInWidth, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux_o, mux_o, mux_o, mux_o, mux_o, mux, mux, mux, mux, mux, mux, name, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nc, nc, nc, nc, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, not_o, not_o, not, not, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, pulldown, pulldown, pullup, pullup, reg_o, reg_o, reg_o, reg_o, reg, reg, reg, reg, regc_o, regc_o, regc_o, regc_o, regc, regc, regc, regc, regce_o, regce_o, regce_o, regce_o, regce, regce, regce, regce, regp_o, regp_o, regp_o, regp_o, regp, regp, regp, regp, regpe_o, regpe_o, regpe_o, regpe_o, regpe, regpe, regpe, regpe, regr_o, regr_o, regr_o, regr_o, regr, regr, regr, regr, regre_o, regre_o, regre_o, regre_o, regre, regre, regre, regre, regs_o, regs_o, regs_o, regs_o, regs, regs, regs, regs, regse_o, regse_o, regse_o, regse_o, regse, regse, regse, regse, shiftl_o, shiftl, shiftl, shiftr_o, shiftr, shiftr, sub_o, sub_o, sub_o, sub_o, sub_o, sub_o, sub, sub, sub, sub, tbuf_o, tbuf_o, tbuf, tbuf, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor

Methods inherited from class byucc.jhdl.base.Structural

behavioralModelIsAvailable, clockMethodIsDisabled, clockMethodIsDisabled, clockMethodIsEnabled, clockMethodIsEnabled, defaultSimulationModelIsBehavioral, hasBeenTraced, hasBeenTraced, hasBehaviorInClockMethod, hasBehaviorInPropagateMethod, isAsynchronouslyScheduled, isAsynchronouslyScheduled, isFallingEdgeTriggered, isReadyToBeAsynchronouslyScheduled, isRisingEdgeTriggered, needsToBeAsynchronouslyScheduled, needsToBeClocked, propagate, propagateMethodIsDisabled, propagateMethodIsDisabled, propagateMethodIsEnabled, propagateMethodIsEnabled, willUseHWUpdate, willUseHWUpdate

Methods inherited from class byucc.jhdl.base.Cell

addPort, addPorts, addProperties, addProperties, addProperty, addProperty, addProperty, addProperty, antecedantIsBehaviorallyModeled, antecedantIsBehaviorallyModeled, bind, bind, bind, bind, cellInterfaceDeterminesUniqueNetlistStructure, clk, connect, connectAllWires, connectOptional, disableAllBehavioralModels, disableBehavioralModel, enableBehavioralModel, getArgument, getAttachedPort, getAttachedWire, getAttachedWireNoException, getCellName, getCellNetlist, getCellNetList, getCellNetlist, getCellNetlist, getDescendents, getFlatNetlist, getFlatNetlistableChildren, getGeneric, getHeight, getNetlistableChildren, getPlacementInfo, getPortProperties, getPortRecord, getPortRecords, getProperties, getProperty, getPropertyValue, getSinkWires, getSourceWires, getUniqueCellName, getWidth, getX, getY, hasPort, hasPorts, in, in, inout, inout, isAsynchronousSourceSinkResolved, isBehaviorallyModeled, isBehaviorallyModeledBranch, isInput, isLeafCell, isNetlistable, isNetlistable, isNetlistablePort, isNetlistLeaf, isNotNetlistable, isNotNetlistablePort, isNotVisible, isOutput, isPlaceable, isPlaceable, isPlaced, isPlaced, isPlacementLocked, isRoot, isSimulateable, isSimulateable, isSink, isSource, isVisible, isVisible, join, lockPlacement, nc, out, out, param, popHierarchy, port, port, port, postorderCheck, preorderCheck, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchyNoImplicitPorts, pushHierarchyNoImplicitPorts, removeAllUnconnectedPorts, removePort, removeProperty, replaceProperty, replaceProperty, resetBehavioralModelsToDefaults, setAsynchronousSourceSinkResolved, setGeneric, setHeight, setNotNetlistable, setNotNetlistable, setNotVisible, setNotVisible, setPlacementInfo, setPortNotNetlistable, setPortNotNetlistable, setProperty, setWidth, subClassDelete, toString, uniquifyCell, userDefinedClockCount, verifyAndCleanup

Methods inherited from class byucc.jhdl.base.Node

addObservable, addSimulatorCallback, checkAll, delete, getBuildingFlag, getChildren, getChildrenEnumeration, getInstanceName, getParent, getParentCell, getRelatives, getSystem, getWires, optimize, orphanAllowed, printAllChildren, printTree, removeSimulatorCallback, setDefaultClock

Methods inherited from class byucc.jhdl.base.Nameable

caseSensitivity, caseSensitivity, disableNameClashChecking, getFullName, getFullNameNoTestBench, getHierNameNoTestBench, getInstanceNo, getInstanceNumber, getLeafName, getLeafName, getRelativeName, getUserName, getUserName, hasUserSpecifiedName, isDescendantOf, setInstanceNumber

Methods inherited from class java.lang.Object

clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait

Field Detail

continueOnFailure

protected static boolean continueOnFailure

verbose

protected static boolean verbose

iterations

protected static int iterations

interactive

protected static boolean interactive

random

protected java.util.Random random

A random number generator

inputValues

protected BV[][] inputValues

inputValues[steps_ago][input_index] are the input values that were put onto wires. inputValues[0][*] are the input values currently being put on the wires. inputValues[max][*] are the input values, possibly from several cycles ago, which correspond to the current set of outputs. If the circuit is combinational, then max=0 (=latency). If the circuit is pipelined, then max=latency.

outputValues

protected BV[] outputValues

b_outputValues

protected BV[] b_outputValues

inputNames

protected java.lang.String[] inputNames

outputNames

protected java.lang.String[] outputNames

b_outputNames

protected java.lang.String[] b_outputNames

UNSIGNED

protected static final int UNSIGNED

See Also:

Constant Field Values

SIGNED

protected static final int SIGNED

See Also:

Constant Field Values

FLOAT

protected static final int FLOAT

See Also:

Constant Field Values

FIXED_BIAS

protected static final int FIXED_BIAS

See Also:

Constant Field Values

FIXED_MASK

protected static final int FIXED_MASK

See Also:

Constant Field Values

FIXED

protected static final int FIXED

See Also:

Constant Field Values

ARG_MASK

protected static final int ARG_MASK

See Also:

Constant Field Values

Constructor Detail

tb_Template

public tb_Template(Node parent)

Override this with a constructor that starts with "super (parent);"

Method Detail

getLatency

protected int getLatency()

Override this to return the latency of the design.

getCorrespondingInput

protected BV getCorrespondingInput(Wire wire)

Returns the input on the wire from several cycles ago, so that the input value corresponds to the current output, even if the circuit is pipelined.

bindInputs

protected final void bindInputs(Wire[] wa)

Tells the testbench template about the input wires. These will drive both the structural and behavioral models.

bindOutputs

protected final void bindOutputs(Wire[] wa)

Tells the testbench template about the output wires from the structural model

bindBehavior

protected final void bindBehavior(Wire[] wa)

Tells the testbench template about the output wires from the behavioral model

bindOutputSigns

protected final void bindOutputSigns(boolean[] signed)

Allows the user to specify which outputs are signed and which are unsigned, so that they appear correctly in the text output.

bindInputTypes

protected final void bindInputTypes(int[] types)

Allows the user to specify input types, such as SIGNED, UNSIGNED, FLOAT, etc. These will be used for the testbench output.

bindOutputTypes

protected final void bindOutputTypes(int[] types)

Allows the user to specify output types, such as SIGNED, UNSIGNED, FLOAT, etc. These will be used for the testbench output.

reset

public void reset()

Puts values on the input wires when the circuit is reset (called by getSystem().reset() )

Specified by:

reset in interface Clockable

Overrides:

reset in class Structural

clock

public void clock()

Puts values on the input wires when the circuit is clocked (called by getSystem().cycle(1) )

Specified by:

clock in interface Clockable

Overrides:

clock in class Structural

execute

public void execute()

The heart of the programmatic testbench. This generates pseudorandom input data for a number of iterations and tests the outputs of the structural model against the behavioral model.

Specified by:

execute in interface ProgrammaticTestBench

userTests

protected boolean userTests()

Override this with a function to check for failure (Optional). This is in addition to the automatic comparison between behavioral and structural models.

For instance, a floating-point module might test the simulation outputs against values computed by Java. It might only compare these values when the floating-point sizes match single- or double-precision.

Returns:

false on failure, true on success

getTestVector

protected java.lang.String[][][] getTestVector()

(Optional) Override this to return the user-defined test vector. test_vector [cycle] [0=in, 1=output] [parameter_index]

runTestVector

protected boolean runTestVector()

User-defined test vector

getValues

protected final void getValues()

After a clock cycle, read the output wire values into variables

resultsToString

protected java.lang.String resultsToString()

Shows the input and output results as a String

fixedToDouble

protected double fixedToDouble(BV bv,
                               int bitsRightOfRadixPoint)

buildNetlist

protected void buildNetlist(Cell cell,
                            boolean xBuild)

Generates an EDIF netlist and optionally builds the design.

Parameters:

cell - The cell to netlist

xBuild - Set this to false (this is not a cross-platform option)