byucc.jhdl.DRC.Rules
Class ClockWires
java.lang.Object
byucc.jhdl.DRC.DesignRule
byucc.jhdl.DRC.Rules.ClockWires
- All Implemented Interfaces:
- DesignRuleConstants
- public class ClockWires
- extends DesignRule
This class implements a DesignRule for checking that implicit and explicit
clocks are not being mixed.
We differentiate in this manner:
A part that uses a clock that is not passed a clock wire explicitely
will have the following trait(s):
- The clock that it uses will be the same as what the "getDefaultClock()" returns
A part that uses a clock that is passed a clock wire explicitely will have
the following trait(s):
- One of the cell_interface ports will be a "clock" port
-OR-
- One of the cell_interface ports will be an "input" port AND the wire
going into that port will be a clock wire.
-OR-
**- The wire coming in the cell's port of type "clk" will be different than the getDefaultClock() wire
A clock wire is distinguishable in the following way(s):
- It is used in a "setClockDriver()" call
-OR-
- It ever goes into a clock port in *any* cell
-OR-
- It is assigned a location property that is the clock pin on the target architecture (this can be a difficult thing to track)
This rule fails under one of the following conditions:
- An explicit clock wire exists, and one or more parts use the implicit global clock
-OR-
- There exists a part that uses a clock that is not explicitely passed a clock wire -AND- there exists a part that uses a clock that is explicitely passed a clock wire
-OR-
- Author:
- Anthony L. Slade
Fields inherited from interface byucc.jhdl.DRC.DesignRuleConstants |
MSGHEADER_ERROR, MSGHEADER_NOTICE, MSGHEADER_STATUS, MSGHEADER_WARNING, MSGTYPE_ERR_ALL, MSGTYPE_ERR_EXPERTWARN, MSGTYPE_ERR_NOEXPERT, MSGTYPE_ERROR_BITS, MSGTYPE_MUTE, MSGTYPE_NOTICE, MSGTYPE_NOTICE_BITS, MSGTYPE_NOTICE_NOEXPERT, MSGTYPE_STATUS, MSGTYPE_STATUS_BITS, MSGTYPE_STATUS_NOEXPERT, MSGTYPE_WARN_ALL, MSGTYPE_WARN_NOEXPERT, MSGTYPE_WARNING_BITS, SHOW_NUM_RULES_CHECKED_EVERY |
Method Summary |
boolean |
checkForAllClockWiresTheSame()
|
protected boolean |
doCheck()
Initiates the design rule check on topCell. |
protected void |
sortCell(Cell cl)
This method is called by the DesignRuleChecker for each
descendant of the top-level cell. |
Methods inherited from class byucc.jhdl.DRC.DesignRule |
addToCellList, addToCellList, addViolatingCell, checkOk, displayMsgHeader, getDescription, getDesignRuleChecker, getName, getOneLineDescription, getReport, getViolatingCells, msg, msg, msg, msg, msgln, msgln, registerViolation, resetState, setCurrentMsgType, setDesignRuleCheckerReference, setName, setReport, toString |
Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait |
clockWires
protected WireList clockWires
- Will hold a list of clock wires.
cellsWithClockPorts
protected CellList cellsWithClockPorts
- Will hold a list of cells that have clock ports.
ClockWires
public ClockWires()
doCheck
protected boolean doCheck()
- Initiates the design rule check on topCell.
- Specified by:
doCheck
in class DesignRule
- Returns:
- true if the design rules checked are kept, otherwise
false.
sortCell
protected void sortCell(Cell cl)
- This method is called by the DesignRuleChecker for each
descendant of the top-level cell.
This sorting is done right before the doCheck method is called.
This method will only look at the cell to see if it has a clock
port. If the cell has a clock port, this method will store the
clock wire connected to it in the WireList clockWires. This
method also indirectly places all of the Cells with clock ports
connected to a clock wire in cellsWithClockPorts.
- Specified by:
sortCell
in class DesignRule
- Parameters:
cl
- Cell to be sorted
checkForAllClockWiresTheSame
public boolean checkForAllClockWiresTheSame()
Copyright ? 2006 Brigham Young University, Configurable Computing Laboratory. All Rights Reserved.