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Packages that use CSRCCL | |
byucc.jhdl.CSRC |
Uses of CSRCCL in byucc.jhdl.CSRC |
Subclasses of CSRCCL in byucc.jhdl.CSRC | |
class |
addsubX
Generic width adder-subtractor. |
class |
addX
Generic width adder. |
class |
and2_dp
This class implements and asynchronous 2-input and gate. |
class |
and2_dp_g
This class implements and asynchronous 2-input and gate. |
class |
and3_dp
This class implements and asynchronous 3-input and gate. |
class |
and3_dp_g
This class implements and asynchronous 3-input and gate. |
class |
and4_dp
This class implements and asynchronous 4-input and gate. |
class |
and5_dp
This class implements and asynchronous 5-input and gate. |
class |
and6_dp
This class implements and asynchronous 6-input and gate. |
class |
and7_dp
This class implements and asynchronous 7-input and gate. |
class |
and8_dp
This class implements and asynchronous 8-input and gate. |
class |
and9_dp
This class implements and asynchronous 9-input and gate. |
class |
andX
This class implements an AND gate with arbitrary number of inputs. |
class |
buf
Buffer. |
class |
bufX
This cell buffers each input wire. |
class |
gndX
This instantiates a generic width vcc. |
class |
IB
This is an input buffer. |
class |
IBX
Generic width output buffer. |
class |
maj3
3-input majority gate. |
class |
mux_dpX
Generic width 2-1 Mux. |
class |
mux3_dp
2-1 Mux. |
class |
nand2_dp
This class implements and asynchronous 2-input nand gate. |
class |
nand2_dp_g
This class implements and asynchronous 2-input nand gate. |
class |
nand3_dp
This class implements and asynchronous 3-input nand gate. |
class |
nand3_dp_g
This class implements and asynchronous 3-input nand gate. |
class |
nand4_dp
This class implements and asynchronous 4-input nand gate. |
class |
nand5_dp
This class implements and asynchronous 5-input nand gate. |
class |
nand6_dp
This class implements and asynchronous 6-input nand gate. |
class |
nand7_dp
This class implements and asynchronous 7-input nand gate. |
class |
nand8_dp
This class implements and asynchronous 8-input nand gate. |
class |
nand9_dp
This class implements and asynchronous 9-input nand gate. |
class |
nandX
This class implements an NAND gate with arbitrary number of inputs. |
class |
nor2_dp
This class implements and asynchronous 2-input nor gate. |
class |
nor2_dp_g
This class implements and asynchronous 2-input nor gate. |
class |
nor3_dp
This class implements and asynchronous 3-input nor gate. |
class |
nor3_dp_g
This class implements and asynchronous 3-input nor gate. |
class |
nor4_dp
This class implements and asynchronous 4-input nor gate. |
class |
nor5_dp
This class implements and asynchronous 5-input nor gate. |
class |
nor6_dp
This class implements and asynchronous 6-input nor gate. |
class |
nor7_dp
This class implements and asynchronous 7-input nor gate. |
class |
nor8_dp
This class implements and asynchronous 8-input nor gate. |
class |
nor9_dp
This class implements and asynchronous 9-input nor gate. |
class |
norX
This class implements an NOR gate with arbitrary number of inputs. |
class |
not_dp
Inverter. |
class |
notX
This cell inverts each input wire. |
class |
OB
This is an output buffer. |
class |
OBT
This is an output buffer with a (high?) asserted output enable. |
class |
OBTX
Generic width output buffer. |
class |
OBX
Generic width output buffer. |
class |
or2_dp
This class implements and asynchronous 2-input or gate. |
class |
or2_dp_g
This class implements and asynchronous 2-input or gate. |
class |
or3_dp
This class implements and asynchronous 3-input or gate. |
class |
or3_dp_g
This class implements and asynchronous 3-input or gate. |
class |
or4_dp
This class implements and asynchronous 4-input or gate. |
class |
or5_dp
This class implements and asynchronous 5-input or gate. |
class |
or6_dp
This class implements and asynchronous 6-input or gate. |
class |
or7_dp
This class implements and asynchronous 7-input or gate. |
class |
or8_dp
This class implements and asynchronous 8-input or gate. |
class |
or9_dp
This class implements and asynchronous 9-input or gate. |
class |
orX
This class implements an OR gate with arbitrary number of inputs. |
class |
subX
Generic width subtractor. |
class |
vccX
This instantiates a generic width vcc. |
class |
xnor2_dp
This class implements and asynchronous 2-input xnor gate. |
class |
xnor2_dp_g
This class implements and asynchronous 2-input xnor gate. |
class |
xnor3_dp
This class implements and asynchronous 3-input xnor gate. |
class |
xnor3_dp_g
This class implements and asynchronous 3-input xnor gate. |
class |
xnor4_dp
This class implements and asynchronous 4-input xnor gate. |
class |
xnor5_dp
This class implements and asynchronous 5-input xnor gate. |
class |
xnor6_dp
This class implements and asynchronous 6-input xnor gate. |
class |
xnor7_dp
This class implements and asynchronous 7-input xnor gate. |
class |
xnor8_dp
This class implements and asynchronous 8-input xnor gate. |
class |
xnor9_dp
This class implements and asynchronous 9-input xnor gate. |
class |
xnorX
This class implements an XNOR gate with arbitrary number of inputs. |
class |
xor2_dp
This class implements and asynchronous 2-input xor gate. |
class |
xor2_dp_g
This class implements and asynchronous 2-input xor gate. |
class |
xor3_dp
This class implements and asynchronous 3-input xor gate. |
class |
xor3_dp_g
This class implements and asynchronous 3-input xor gate. |
class |
xor4_dp
This class implements and asynchronous 4-input xor gate. |
class |
xor5_dp
This class implements and asynchronous 5-input xor gate. |
class |
xor6_dp
This class implements and asynchronous 6-input xor gate. |
class |
xor7_dp
This class implements and asynchronous 7-input xor gate. |
class |
xor8_dp
This class implements and asynchronous 8-input xor gate. |
class |
xor9_dp
This class implements and asynchronous 9-input xor gate. |
class |
xorX
This class implements an XOR gate with arbitrary number of inputs. |
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