|
Class Summary |
| addsubX |
Generic width adder-subtractor. |
| addX |
Generic width adder. |
| bufX |
This cell buffers each input wire. |
| ClockDriver |
|
| Constant |
This class is a structural cell which drives a constant value
on to its output wire. |
| FD |
|
| gndX |
This instantiates a generic width vcc. |
| muxX |
Generic width 2-1 Mux. |
| notX |
This cell inverts each input wire. |
| regX |
This instantiates a generic width dff. |
| Shifter |
This shifter was taken straight from the Xilinx directory. |
| subX |
Generic width subtractor. |
| TechMapper |
|
| tera_add |
Full Adder teramac style. |
| tera_and2 |
This class implements and asynchronous 2-input and gate. |
| tera_and2_g |
This class implements and asynchronous 2-input and gate. |
| tera_and3 |
This class implements and asynchronous 3-input and gate. |
| tera_and3_g |
This class implements and asynchronous 3-input and gate. |
| tera_and4 |
This class implements and asynchronous 4-input and gate. |
| tera_and4_g |
This class implements and asynchronous 4-input and gate. |
| tera_and5 |
This class implements and asynchronous 5-input and gate. |
| tera_and5_g |
This class implements and asynchronous 5-input and gate. |
| tera_and6 |
This class implements and asynchronous 6-input and gate. |
| tera_and6_g |
This class implements and asynchronous 6-input and gate. |
| tera_and7 |
This class implements and asynchronous 7-input and gate. |
| tera_and7_g |
This class implements and asynchronous 7-input and gate. |
| tera_and8 |
This class implements and asynchronous 8-input and gate. |
| tera_and8_g |
This class implements and asynchronous 8-input and gate. |
| tera_buf |
Buffer. |
| tera_dff |
The tera_dff is a simple D-flipflop. |
| tera_high |
Returns a logic one. |
| tera_inv |
Inverter. |
| tera_low |
Returns a logic zero. |
| tera_mem |
Buffer. |
| tera_mux2 |
Mux2 |
| tera_mux4 |
Mux4 |
| tera_nand2 |
This class implements and asynchronous 2-input nand gate. |
| tera_nand2_g |
This class implements and asynchronous 2-input nand gate. |
| tera_nand3 |
This class implements and asynchronous 3-input nand gate. |
| tera_nand3_g |
This class implements and asynchronous 3-input nand gate. |
| tera_nand4 |
This class implements and asynchronous 4-input nand gate. |
| tera_nand4_g |
This class implements and asynchronous 4-input nand gate. |
| tera_nand5 |
This class implements and asynchronous 5-input nand gate. |
| tera_nand5_g |
This class implements and asynchronous 5-input nand gate. |
| tera_nand6 |
This class implements and asynchronous 6-input nand gate. |
| tera_nand6_g |
This class implements and asynchronous 6-input nand gate. |
| tera_nand7 |
This class implements and asynchronous 7-input nand gate. |
| tera_nand7_g |
This class implements and asynchronous 7-input nand gate. |
| tera_nand8 |
This class implements and asynchronous 8-input nand gate. |
| tera_nand8_g |
This class implements and asynchronous 8-input nand gate. |
| tera_nor2 |
This class implements and asynchronous 2-input nor gate. |
| tera_nor2_g |
This class implements and asynchronous 2-input nor gate. |
| tera_nor3 |
This class implements and asynchronous 3-input nor gate. |
| tera_nor3_g |
This class implements and asynchronous 3-input nor gate. |
| tera_nor4 |
This class implements and asynchronous 4-input nor gate. |
| tera_nor4_g |
This class implements and asynchronous 4-input nor gate. |
| tera_nor5 |
This class implements and asynchronous 5-input nor gate. |
| tera_nor5_g |
This class implements and asynchronous 5-input nor gate. |
| tera_nor6 |
This class implements and asynchronous 6-input nor gate. |
| tera_nor6_g |
This class implements and asynchronous 6-input nor gate. |
| tera_nor7 |
This class implements and asynchronous 7-input nor gate. |
| tera_nor7_g |
This class implements and asynchronous 7-input nor gate. |
| tera_nor8 |
This class implements and asynchronous 8-input nor gate. |
| tera_nor8_g |
This class implements and asynchronous 8-input nor gate. |
| tera_or2 |
This class implements and asynchronous 2-input or gate. |
| tera_or2_g |
This class implements and asynchronous 2-input or gate. |
| tera_or3 |
This class implements and asynchronous 3-input or gate. |
| tera_or3_g |
This class implements and asynchronous 3-input or gate. |
| tera_or4 |
This class implements and asynchronous 4-input or gate. |
| tera_or4_g |
This class implements and asynchronous 4-input or gate. |
| tera_or5 |
This class implements and asynchronous 5-input or gate. |
| tera_or5_g |
This class implements and asynchronous 5-input or gate. |
| tera_or6 |
This class implements and asynchronous 6-input or gate. |
| tera_or6_g |
This class implements and asynchronous 6-input or gate. |
| tera_or7 |
This class implements and asynchronous 7-input or gate. |
| tera_or7_g |
This class implements and asynchronous 7-input or gate. |
| tera_or8 |
This class implements and asynchronous 8-input or gate. |
| tera_or8_g |
This class implements and asynchronous 8-input or gate. |
| tera_xnor2 |
This class implements and asynchronous 2-input xnor gate. |
| tera_xnor2_g |
This class implements and asynchronous 2-input xnor gate. |
| tera_xnor3 |
This class implements and asynchronous 3-input xnor gate. |
| tera_xnor3_g |
This class implements and asynchronous 3-input xnor gate. |
| tera_xnor4 |
This class implements and asynchronous 4-input xnor gate. |
| tera_xnor4_g |
This class implements and asynchronous 4-input xnor gate. |
| tera_xnor5 |
This class implements and asynchronous 5-input xnor gate. |
| tera_xnor5_g |
This class implements and asynchronous 5-input xnor gate. |
| tera_xnor6 |
This class implements and asynchronous 6-input xnor gate. |
| tera_xnor6_g |
This class implements and asynchronous 6-input xnor gate. |
| tera_xnor7 |
This class implements and asynchronous 7-input xnor gate. |
| tera_xnor7_g |
This class implements and asynchronous 7-input xnor gate. |
| tera_xnor8 |
This class implements and asynchronous 8-input xnor gate. |
| tera_xnor8_g |
This class implements and asynchronous 8-input xnor gate. |
| tera_xor2 |
This class implements and asynchronous 2-input xor gate. |
| tera_xor2_g |
This class implements and asynchronous 2-input xor gate. |
| tera_xor3 |
This class implements and asynchronous 3-input xor gate. |
| tera_xor3_g |
This class implements and asynchronous 3-input xor gate. |
| tera_xor4 |
This class implements and asynchronous 4-input xor gate. |
| tera_xor4_g |
This class implements and asynchronous 4-input xor gate. |
| tera_xor5 |
This class implements and asynchronous 5-input xor gate. |
| tera_xor5_g |
This class implements and asynchronous 5-input xor gate. |
| tera_xor6 |
This class implements and asynchronous 6-input xor gate. |
| tera_xor6_g |
This class implements and asynchronous 6-input xor gate. |
| tera_xor7 |
This class implements and asynchronous 7-input xor gate. |
| tera_xor7_g |
This class implements and asynchronous 7-input xor gate. |
| tera_xor8 |
This class implements and asynchronous 8-input xor gate. |
| tera_xor8_g |
This class implements and asynchronous 8-input xor gate. |
| TERACL |
|
| TESTTERALibrary |
This class is the self-test controller for the TERA library. |
| TWire |
|
| vccX |
This instantiates a generic width vcc. |